• Journal of Power Electronics
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• 제16권2호
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• pp.498-511
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• 2016

This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.

• 조명전기설비학회논문지
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• 제18권2호
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• pp.68-74
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• 2004

본 논문에서는 고조파를 저감시키고 출력파형 개선을 위한 방법으로 입력측 DC링크 전압의 조합을 이용한 새로운 하이브리드형 멀티레벨 인버터를 제안한다. 제안한 인버터는 단상 풀-브릿지 인버터 모듈로 구성된 3개의 H-bridge cell로 구성되어 있다. 2개의 풀-브릿지 모듈은 레벨생성을 위해 사용되고 나머지 하나의 모듈은 PWM 스위칭 동작에 사용되어진다. 레벨 생성을 위한 인버터에 의해 9레벨이 생성되고 PWM 동작을 위한 인버터에 의해 2레벨이 더해지게 되어 결과적으로 총 11레벨의 출력전압을 생성시킬 수 있다. 제안한 시스템의 기본적인 동작원리를 상세하게 설명하고 PSpice 시뮬레이션과 시작품을 이용한 실험을 통해 타당성을 증명할 수 있었다.

• Journal of Power Electronics
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• 제14권2호
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• pp.302-314
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• 2014

Due to advancements in power electronics and inverter topologies, the current controlled multilevel voltage-source pulse width modulated (PWM) inverter is usually preferred for accurate control, quick response and high dynamic performance. A multilevel topology approach is found to be best suited for overcoming many problems arising from the use of high power converters. This paper presents a comprehensive review and comparative study of several current control (CC) techniques for multilevel inverters with a special emphasis on various approaches of the hysteresis current controller. Since the hysteresis CC technique poses a problem of variable switching frequency, a ramp-comparator controller and a predictive controller to attain constant switching frequency are described along with its quantitative comparison. Furthermore, various methods have been reviewed to achieve hysteresis current control PWM with constant switching frequency operation. This paper complies various guidelines to choose a particular method suitable for application at a given power level, switching frequency and dynamic response.

• Journal of Power Electronics
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• 제5권1호
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• pp.76-82
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• 2005

A novel variant of full multi-modulation applications to diode-clamped and cascade multilevel inverter-termed single carrier multi-modulation is presented. The proposed PWM-technique is advantageous for its simple implementation. The correlation between multi-carrier and single-carrier multi-modulations is deduced. For the PWM methods, a mathematical model of voltage source inverter and general algorithm for the multi-modulating modulator are proposed. The theory is demonstrated by simulation results

• 전력전자학회논문지
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• 제8권2호
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• pp.99-106
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• 2003

본 논문에서는 출력 전압 파형을 개선하고 고조파 성분을 저감시키기 위한 한 방법으로 변압기 2차측을 직렬로 결합시킨 형태를 가지는 새로운 멀티 레벨 인버터를 제안한다. 제안된 11 레벨 PWM 인버터는 출력 전압의 각 레벨을 형성하기 위한 두 개의 level 인버터 모듈과 PWM 스위칭 동작을 위한 PWM 인버터 모듈, 그리고 3대의 변압기로 구성된다. 적절한 변압기의 권선비를 이용하여 직류 전원에 대한 정수비의 연속적인 출력 전압 레벨을 형성하였으며, 변압기의 직렬 결합으로 출력단의 필터용 인덕허가 필요 없는 장점을 가진다. 제안하는 PWM 인버터의 타당성을 입증하기 위해 24 [V] 직류 전원에서 220 [V] 교류 전원을 발생시킬 수 있는 인버터의 시작품을 제작하고 실험을 행하였으며, 기존의 멀티 레벨 방식을 이용한 11 레벨 PWM 인버터와 제안된 11 레벨 PWM 인버터의 비교를 통해 제안하는 인버터의 타당성을 검증하였다.

• 전기학회논문지
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• 제62권4호
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• pp.502-509
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• 2013

It presents an efficient switching pattern, which expects a reduction of switching losses in a cascaded H-bridge PWM multilevel inverter. By the proposed switching scheme, the lower H-bridge module operates at low frequency of 60[Hz] because it assigns to transfer most load power. The upper H-bridge module operates at high frequency of PWM switching to improve THD of output voltage. The proposed switching pattern applies to cascaded H-bridge multilevel inverter with PD, APOD, bipolar, and unipolar switching methods. By computer-aided simulations, we verify the validity of the proposed switching scheme. Finally, we prove that the proposed PD and APOD switching patterns are better than those of the conventional one in efficiency.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.1119-1122
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• 1992

This paper deals with a novel method of modeling and analyzing multilevel pulse width modulation(PWM) inverter/rectifier, which leads to extraction of equivalent circuit in fundamental frequency domain. By the technique, we can draw out the corresponding linear time invariant circuit even thuogh the actual circuit is switched. A static VAR compensator using five-level inverter is modeled and simulated for the verification of the modeling.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.625-629
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• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• Journal of Power Electronics
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• 제19권4호
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.