• Journal of Power Electronics
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• 제15권3호
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• pp.685-694
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• 2015

The power loss of the controllable switches in modular multilevel converter (MMC) HVDC transmission systems is an important factor, which can determine the design of the operating junction temperatures. Due to the dc current component, the approximate calculation tool provided by the manufacturer of the switches cannot be used for the losses of the switches in the MMC. Based on the enabled probabilities of each SM in an arm, the current analytical models of the switches can be determined. The average and RMS currents can be obtained from the corresponding current analytical model. Then, the conduction losses can be calculated, and the switching losses of the switches can be estimated according to the upper limit of the switching frequency. Finally, the thermal resistance model of the switches can be utilized, and the junction temperatures can be estimated. A comparison between the calculation and PSCAD simulation results shows that the proposed method is effective for estimating the junction temperatures of the switches in the MMC.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권4호
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• pp.457-463
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• 2012

Cascaded H-bridge multilevel inverters shows a useful circuit configuration to increase the number of output voltage levels to obtain high quality output voltage. By applying the concept of the power of three to dc voltage sources, it can increase the number of output voltage levels effectively. To realize this concept, two approaches may be considered. One is to use independent dc voltage sources pre-scaled in the power of three, and the other is to use instantaneous dc voltage sources generated from a cascaded transformer, which has the secondary turn-ratios scaled in the power of three in sequence. A common feature in both approaches is to use the concept of the power of three for dc voltage sources, and a point of difference is whether it adopts a low frequency transformer or not, and where the transformer is located. According to the difference, application areas are limited and show different characteristics on THD of output voltages. We compare and analyze both approaches for their circuit configurations, voltage level generating method, THD characteristics of output voltage, efficiency, application areas, limitations, and other characteristics by experiments using 500 [W] prototypes when they generate a 27-level output voltage.

• Transactions on Electrical and Electronic Materials
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• 제18권2호
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• pp.103-110
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• 2017

The number of applications of solar photovoltaic (PV) systems in power generation grids has increased in the last decade because of their ability to generate efficient and reliable power in a variety of low installation in domestic applications. Various PV converter topologies have therefore emerged, among which the modular multilevel converter (MMC) is very attractive due to its modularity and transformerless features. The modeling and control of the MMC has become an interesting issue due to the extremely large expansion of PV power plants at the residential scale and due to the power quality requirement of this application. This paper proposes a novel control method of MMC which is used to directly integrate the photovoltaic arrays with the power grid. Traditionally, a closed loop control has been used, although circulating current control and capacitors voltage balancing in each individual leg have remained unsolved problem. In this paper, the integration of model predictive control (MPC) and traditional closed loop control is proposed to control the MMC structure in a PV grid tied mode. Simulation results demonstrate the efficiency and effectiveness of the proposed control model.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.725-728
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• 2004

In this study, the effect of mode II by variation of multilevel loading direction was experimentally investigated in the fatigue crack propagation behavior. To generate mixed-mode I+II loading state, the compact tension shear(CTS) specimen and loading device were used in this tests. The experimental method divided into three steps and three cases that were step I(0$^{\circ}$), step II(30$^{\circ}$, 60$^{\circ}$, 90$^{\circ}$),step III(0$^{\circ}$) and case I(0$^{\circ}$ ⇒ 30$^{\circ}$ ⇒ 0$^{\circ}$), case II(0$^{\circ}$ ⇒ 60$^{\circ}$ ⇒ 0$^{\circ}$), case III(0$^{\circ}$ ⇒ 90$^{\circ}$ ⇒ 0$^{\circ}$). The result of test, the step II affected to the step III in the all case. Specially, The fatigue crack propagation rate was faster and the fatigue life was smaller than of mixed mode I+II(30$^{\circ}$,60$^{\circ}$) due to the effect of mode II in the step III of the case III

• Journal of Power Electronics
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• 제18권2호
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• pp.522-532
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• 2018

The cascaded H Bridge (CHB) multilevel inverter (MLI) is popular among the classical MLI topologies due to its modularity and reliability. Although space vector modulation (SVM) is the most suitable modulation scheme for MLIs, it has not been used widely in industry due to the higher complexity involved in its implementation. In this paper, a simple and novel generalized SVM algorithm is proposed, which has both reduced time and space complexity. The proposed SVM involves the generalization of both the duty cycle calculation and switching sequence generation for any n-level inverter. In order to generate the gate pulses for an inverter, a generalized switch matrix (SM) for the CHB inverter is also introduced, which further simplifies the algorithm. The algorithm is tested and verified for three-phase, three-level and five-level CHB inverters in simulations and hardware implementation. A comparison of the proposed method with existing SVM schemes shows the superiority of the proposed scheme.

• Journal of Power Electronics
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• 제16권6호
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• pp.2294-2305
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• 2016

The introduction of a high-voltage direct-current (HVDC) system based on a modular multilevel converter (MMC) for wind farm integration has stimulated studies on methods to control this type of converter. This research article focuses on the control of the AC voltage and circulating current for a wind-farm-side MMC (WFS-MMC). After theoretical analysis, emotional learning (EL) controllers are proposed for the controls. The EL controllers are derived from the learning mechanisms of the amygdala and orbitofrontal cortex which make the WFS-MMC insensitive to variance in system parameters, power change, and fault in the grid. The d-axis and q-axis currents are respectively considered for the d-axis and q-axis voltage controls to improve the performance of AC voltage control. The practicability of the proposed control is verified under various conditions with a point-to-point MMC-HVDC system. Simulation results show that the proposed method is superior to the traditional proportional-integral controller.

• Journal of Power Electronics
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• 제13권1호
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• pp.59-69
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• 2013

An alternative technique to control multilevel inverters with vector approximations has been presented. The innovative control method utilizes specially designed two-dimensional hysteresis comparators to simplify the implementation and improve the resultant waveform. The multistage inverter designed with maximum number of levels is operated in such a way to approximate the reference voltage vector by exploiting the large number of multilevel inverter vectors. A three-stage inverter with the main high voltage stage made of three phase, six-switch and singly-fed inverter is considered for application to the proposed design. The proposed control concept is to maintain a higher voltage stage state as long as it can lead to a target vector. High and medium voltage stages controllers are based on surface hysteresis comparators to hold the switching state or to perform the necessary change to achieve its reference voltage with minimal switching losses. The low voltage stage controller is designed to approximate the target reference voltage to the nearest inverter vector using the nearest integer rounding and adjustment comparators. Model simulation and prototype test results show that the proposed control technique clearly outperforms the previous control methods.

• Journal of Power Electronics
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• 제14권3호
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• pp.488-498
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• 2014

This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, the Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used the relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using a field-programmable gate array (FPGA) is described and has been implemented on an Altera DE2 board. The proposed SHE is efficient in eliminating the $3^{rd}$, $5^{th}$, $7^{th}$, $9^{th}$ and $11^{th}$ order harmonics, which validates the analytical results. From the results, it can be seen that the adopted 13-level inverter produces a higher quality with a better harmonic profile and sinusoidal shape of the stepped output waveform.

• Journal of Power Electronics
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• 제17권1호
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• pp.106-114
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• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• 제35권1호
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• pp.44-49
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• 2022

In this paper, we investigated current (I)- and voltage (V)-sweeping properties in a double-stack structure, Ge₂Sb₂Te₅/Ti/W-doped Ge₈Sb₂Te₁₁, a candidate medium for applications to multilevel phase-change memory. 200-nm-thick and W-doped Ge₂Sb₂Te₅ and W-doped Ge₈Sb₂Te₁₁ films were deposited on p-type Si(100) substrate using magnetron sputtering system, and the sheet resistance was measured using 4 point-probe method. The sheet resistance of amorphous-phase W-doped Ge₈Sb₂Te₁₁ film was about 1 order larger than that of Ge₂Sb₂Te₅ film. The I- and V-sweeping properties were measured using sourcemeter, pulse generator, and digital multimeter. The speed of amorphous-to-multilevel crystallization was evaluated from a graph of resistance vs. pulse duration (t) at a fixed applied voltage (12 V). All the double-stack cells exhibited a two-step phase change process with the multilevel memory states of high-middle-low resistance (HR-MR-LR). In particular, the stable MR state is required to guarantee the reliability of the multilevel phase-change memory. For the Ge₂Sb₂Te₅ (150 nm)/Ti (20 nm)/W-Ge₈Sb₂Te₁₁ (50 nm), the phase transformations of HR→MR and MR→LR were observed at t<30ns and t<65ns, respectively. We believe that a high speed and stable multilevel phase-change memory can be optimized by the double-stack structure of proper Ge-Sb-Te films separated by a barrier metal (Ti).