• Journal of international Conference on Electrical Machines and Systems
• /
• 제2권2호
• /
• pp.190-196
• /
• 2013

It presents a unification of buck-boost and flyback converter for driving a cascaded H-bridge multilevel inverter with a single independent DC voltage source. Cascaded H-bridge multilevel inverter is useful to make many output voltage levels for sinusoidal waveform by combining two or more H-bridge modules. However, each H-bridge module needs an independent DC voltage source to generate multi levels in an output voltage. This topological characteristic brings a demerit of increasing the number of independent DC voltage sources when it needs to increase the number of output voltage levels. To solve this problem, we propose a converter combining a buck-boost converter with a flyback converter. The proposed converter provides independent DC voltage sources at back-end two H-bridge modules. After analyzing theoretical operation of the circuit topology, the validity of the proposed approach is verified by computer-aided simulations using PSIM and experiments.

• Journal of Power Electronics
• /
• 제19권1호
• /
• pp.244-253
• /
• 2019

Finite control set model-predictive control (FCS-MPC) has received increasing attentions due to its outstanding dynamic performance. It is being widely used in power converters and multilevel inverters. However, FCS-MPC requires a lot of calculations, especially for multilevel-cascaded H-bridge (CHB) static synchronous compensators (STATCOMs), since it has to take account of all the feasible voltage vectors of inverters. Hence, an improved five-segment space vector pulse width modulation (SVPWM) method based on the non-orthogonal static reference frames is proposed. The proposed SVPWM method has a lower number of switching states and requires fewer computations than the conventional method. As a result, it makes FCS-MPC more efficient for multilevel cascaded H-bridge STATCOMs. The partial cost function is adopted to sequentially solve for the reference current and capacitor voltage. The proposed FCS-MPC method can reduce the calculation burden of the FCS-MPC strategy, and reduce both the switching frequency and power losses. Simulation and experimental results validate the excellent performance of the proposed method when compared with the conventional approach.

• Journal of Power Electronics
• /
• 제5권2호
• /
• pp.142-150
• /
• 2005

This paper presents a systematic approach to study the carrier based pulse width modulation (PWM) techniques applied to diode-clamped and cascade multilevel inverters by using multi-modulating patterns. This method is based on the description of controllable redundant parameters in the modulating signals. A unified mathematical formulation is presented for carrier based PWM methods, which obtains outputs similar to the corresponding space vector PWM. A full and separate control of the fundamental voltage, vector redundancies and phase redundancies can be obtained in the carrier based PWM. In this paper, the proposed PWM method and corresponding algorithm for generating multi-modulating signals will be formulated and demonstrated by our simulations.

• Journal of Power Electronics
• /
• 제16권4호
• /
• pp.1504-1512
• /
• 2016

This paper presents a new single-phase asymmetrical cascaded multilevel DC-link inverter. The proposed inverter comprises two stages. The main stage of the inverter consists of multiple similar cells, each of which is a half-bridge inverter consisting of two switches and a single DC source. All cells are connected in a cascaded manner with a fixed neutral point. The DC source values are not made equal to increase the performance of the inverter. The second circuit is a folded cascaded H-bridge circuit operating at a line frequency. One of the main advantages of this proposed topology is that it is a modular type and can thus be extended to high stages without changing the configuration of the main stage circuit. Two control schemes, namely, low switching with selective harmonic elimination and sinusoidal pulse width modulation, are employed to validate the proposed topology. The detailed approach of each control scheme and switching pulses are discussed in detail. A 150W prototype of the proposed system is implemented in the laboratory to verify the validity of the proposed topology.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
• /
• pp.620-624
• /
• 2004

Th is paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using the proposed multi-modulating pattern method. This method is based on the vector correlation between CPWM and space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. The CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain a full vector redundancy control, and fully utilize phase redundancy in a cascade inverter. In the paper, CPWM equations and corresponding algorithm for generating multi-modulating signals will be performed, in which SVPWM attributes will be presented by corresponding controllable factors.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
• /
• pp.625-629
• /
• 2004

This paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using a proposed named multi-modulating pattern method. This method is based on the vector correlation between CPWM and the space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. A CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of the corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain the full vector redundancy control, and fully utilize phase redundancy in a cascade inverter In this continued part, it will be deduced correlation between CPWM equations in multi-carrier system and single carrier system, present the mathematical model of voltage source inverter related to the common mode voltage and propose a general algorithm for multi-modulating modulator. The obtained theory will be demonstrated by simulation results.

• Toxicological Research
• /
• 제24권4호
• /
• pp.235-243
• /
• 2008

While in some instances, loss of diversity results from acute toxicity (e.g. major pollution incidents), in most cases it results from long-term sub-lethal effects that alter the relative competitive ability and fitness of certain organisms. In such cases the sub-lethal effects will cause a physiological response in the organism that ultimately leads to community level changes. Very sensitive tools are now available to study sub-lethal responses at the molecular level. However, relating such laboratory measurements to ecological effects represents a substantial challenge that can only be met by investigation at all scales (molecular, individual organism and community level) with an appropriate group of organisms. Among the various in vertebrates which can be used as model organisms in such a way, the soil nematode, Caenorhabditis elegans appear to be a promising biological model to diagnose environmental quality. This paper reviews the current status of multilevel biomarkers in environmental toxicology, and C. elegans as promising organisms for this approach.

• Journal of Power Electronics
• /
• 제11권1호
• /
• pp.21-27
• /
• 2011

In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.

• 한국컴퓨터정보학회논문지
• /
• 제20권11호
• /
• pp.77-88
• /
• 2015

This study attempts to investigate the effect of team diversity on individual creativity and team members' creative activities such as exploration and exploitation. We have garnered 40 team data from 249 respondents who have been participating in the team learning activities during semester in a private university. They were asked by instructor to show their creativity, and exploration and exploitation activities. The 40 teams were made up of team diversity factors such as study hour and leisure activity. We used a multilevel analysis to analyze the effects of team diversity factors on team member's creativity, and exploration and exploitation. Results showed that in general, team diversity factors like study hour and leisure activities have significant effects on the individual creativity, and exploration and exploitation. Practical implications represent that teams need to be organized considering the team diversity factors in order to improve team member's creativity, and their exploration and exploitation activities.

• Journal of Power Electronics
• /
• 제15권4호
• /
• pp.964-973
• /
• 2015

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.