• Title/Summary/Keyword: Multi-processing

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Design and Implementation Flight Action Game Application of using Unityent (유니티를 이용한 비행 액션 게임 어플리케이션 설계 및 구현)

  • Do, Hyemi;Jeong, Yerinm;Kim, Hwanhee;Lee, Sangwon;Jung, Minsuk;Hong, Jongwan;Park, Eunju;Lim, Hankyu
    • Annual Conference of KIPS
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    • 2017.04a
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    • pp.141-143
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    • 2017
  • 많은 사람이 스마트폰을 소유하고 어디에서나 스마트폰 사용 모습을 볼 수 있을 만큼 스마트폰의 사용이 일상화되어 가고 있다. 스마트폰 사용 중 특히 모바일게임은 스마트폰이 보급된 이후 꾸준히 성장해온 시장으로 많은 게임이 있다. 그 가운데 국내 모바일 게임 시장에서 인기가 있는 게임은 RPG(Role Playing Game)게임이다. RPG 게임은 게임의 재미를 위하여 오랜 시간 성장이 필요하고, 자동기능을 통해 게임을 즐기기보다는 성장에 주목적을 두고 게임을 하고 있다. 이에 본 논문에서는 간단한 조작만으로 게임을 즐길 수 있는 아케이드 게임을 설계하고 Unity를 사용하여 이를 구현하였다.

Development of Multi-Band Multi-Mode SDR Radar Platform (다중 대역 다중 모드 SDR 레이다 플랫폼 개발)

  • Kwag, Young-Kil;Woo, In-Sang
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.11
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    • pp.949-958
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    • 2016
  • This paper presents the new development result of the multi-band, the multi-mode SDR(Software Defined Radar) platform. The SDR hardware platform is implemented by using the reconfigurable multi-band RF transceiver and antenna modules of S, X, and K-bands, and a programmable signal processing module. The SDR software platform is implemented by using the multi-mode waveform generation of CW, Pulse, FMCW, and LFM Chirp as well as the adaptable algorithm library of signal processing and open API software modules. Through the integrated test of the SDR platform, the operational performance was verified in real-time. Also, through the field-application test, the ground target and air-vehicle drone target were successfully detected and their test results were presented.

Strategy for Task Offloading of Multi-user and Multi-server Based on Cost Optimization in Mobile Edge Computing Environment

  • He, Yanfei;Tang, Zhenhua
    • Journal of Information Processing Systems
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    • v.17 no.3
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    • pp.615-629
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    • 2021
  • With the development of mobile edge computing, how to utilize the computing power of edge computing to effectively and efficiently offload data and to compute offloading is of great research value. This paper studies the computation offloading problem of multi-user and multi-server in mobile edge computing. Firstly, in order to minimize system energy consumption, the problem is modeled by considering the joint optimization of the offloading strategy and the wireless and computing resource allocation in a multi-user and multi-server scenario. Additionally, this paper explores the computation offloading scheme to optimize the overall cost. As the centralized optimization method is an NP problem, the game method is used to achieve effective computation offloading in a distributed manner. The decision problem of distributed computation offloading between the mobile equipment is modeled as a multi-user computation offloading game. There is a Nash equilibrium in this game, and it can be achieved by a limited number of iterations. Then, we propose a distributed computation offloading algorithm, which first calculates offloading weights, and then distributedly iterates by the time slot to update the computation offloading decision. Finally, the algorithm is verified by simulation experiments. Simulation results show that our proposed algorithm can achieve the balance by a limited number of iterations. At the same time, the algorithm outperforms several other advanced computation offloading algorithms in terms of the number of users and overall overheads for beneficial decision-making.

A Study on Parallel Processing System for Automatic Segmentation of Moving Object in Image Sequences

  • Lee, Hyung;Park, Jong-Won
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.429-432
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    • 2000
  • The new MPEG-4 video coding standard enables content-based functionalities. In order to support the philosophy of the MPEG-4 visual standard, each frame of video sequences should be represented in terms of video object planes (VOP’s). In other words, video objects to be encoded in still pictures or video sequences should be prepared before the encoding process starts. Therefore, it requires a prior decomposition of sequences into VOP’s so that each VOP represents a moving object. A parallel processing system is required an automatic segmentation to be processed in real-time, because an automatic segmentation is time consuming. This paper addresses the parallel processing: system for an automatic segmentation for separating moving object from the background in image sequences. The proposed parallel processing system comprises of processing elements (PE’s) and a multi-access memory system (MAMS). Multi-access memory system is a memory controller to perform parallel memory access with the variety of types: horizontal, vertical, and block access way. In order to realize these ways, a multi-access memory system consists of a memory module selection module, data routing modules, and an address calculation and routing module. The proposed system is simulated and evaluated by the CADENCE Verilog-XL hardware simulation package.

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A Study on Multi-Bit Processing Scheme of GPS Receiver for Fail-Safe Seaway (Fail-Safe Seaway를 위한 GPS 수신기의 다중비트처리기법 연구)

  • Cho Deuk-Jae;Oh Se-Woong;Suh Sang-Hyun
    • Journal of Navigation and Port Research
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    • v.29 no.10 s.106
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    • pp.877-882
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    • 2005
  • It is necessary that Fail-Safe Seaway technology providing a continuous navigation solution though fault of navigation system is occurred in sea. This paper focus on signal processing of GPS receiver, one of receivers using the software radio technology to implement a integrated radio navigation system including satellite-based and ground-based navigation systems. It is difficult to implement the software GPS receivers using a commercial processor because of the heavy computational burden for processing the GPS signals in real time. This paper proposes an efficient multi-bit GPS signal processing scheme to reduce the computational burden for processing the GPS signals in the software GPS receiver. The proposed scheme uses a compression concept of the multi-bit replica signals and patterned look-up table method to generate the correlation value between the GPS signals and the replica signals.

Efficient Hardware Transactional Memory Scheme for Processing Transactions in Multi-core In-Memory Environment (멀티코어 인메모리 환경에서 트랜잭션을 처리하기 위한 효율적인 HTM 기법)

  • Jang, Yeonwoo;Kang, Moonhwan;Yoon, Min;Chang, Jaewoo
    • KIISE Transactions on Computing Practices
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    • v.23 no.8
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    • pp.466-472
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    • 2017
  • Hardware Transactional Memory (HTM) has greatly changed the parallel programming paradigm for transaction processing. Since Intel has recently proposed Transactional Synchronization Extension (TSX), a number of studies based on HTM have been conducted. However, the existing studies support conflict prediction for a single cause of the transaction processing and provide a standardized TSX environment for all workloads. To solve the problems, we propose an efficient hardware transactional memory scheme for processing transactions in multi-core in-memory environment. First, the proposed scheme determines whether to use Software Transactional Memory (STM) or the serial execution as a fallback path of HTM by using a prediction matrix to collect the information of previously executed transactions. Second, the proposed scheme performs efficient transaction processing according to the characteristic of a given workload by providing a retry policy based on machine learning algorithms. Finally, through the experimental performance evaluation using Stanford transactional applications for multi-processing (STAMP), the proposed scheme shows 10~20% better performance than the existing schemes.

A Study on Multi-Bit Processing Scheme of GPS Receiver for Fail-Safe Seaway (Fail-Safe Seaway를 위한 GPS 수신기의 다중비트처리기법 연구)

  • Cho Deuk-Jae;Oh Se-Woong;Suh Sang-Hyun
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2005.10a
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    • pp.37-42
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    • 2005
  • It is necessary that Fail-Safe Seaway technology providing a continuous navigation solution though fault of navigation system is occurred in sea. This paper focus on signal processing of GPS receiver, one of receivers using the software radio technology to implement a integrated radio navigation system including satellite-based and ground-based navigation systems. It is difficult to implement the software GPS receivers using a commercial processor bemuse of the heavy computational burden for processing the GPS signals in real time. This paper proposes an efficient multi-bit GPS signal processing scheme to reduce the computational burden for processing the GPS signals in the software GPS receiver. The proposed scheme uses a compression concept of the multi-bit replica signals and patterned look-up table method to generate the correlation value between the GPS signals and the replica signals.

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Turbo Perallel Space-Time Processing System with LDPC Code in MIMO Channel for High-Speed Wireless Communications (MIMO 채널에서 고속 무선 통신을 위한 LDPC 부호를 갖는 터보 병렬 시공간 처리 시스템)

  • 조동균;박주남;황금찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.10C
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    • pp.923-929
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    • 2003
  • Turbo processing have been known as methods close to Shannon limit in the aspect of wireless multi-input multi-output (MIMO) communications similarly to wireless single antenna communication. The iterative processing can maximize the mutual effect of coding and interference cancellation, but LDPC coding has not been used for turbo processing because of the inherent decoding process delay. This paper suggests a LDPC coded MIMO system with turbo parallel space-time (Turbo-PAST) processing for high-speed wireless communications and proposes a average soft-output syndrome (ASS) check scheme at low signal to noise ratio (SNR) for the Turbo-PAST system to decide the reliability of decoded frame. Simulation results show that the suggested system outperforms conventional system and the proposed ASS scheme effectively reduces the amount of turbo processing iterations without performance degradation from the point of average number of iterations.

Implementation of the multi-target tracker for MIROSOT

  • In, Chu-Sik;Choi, Yong-Hee;Lee, Ja-Sung
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.828-831
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    • 1997
  • One of the most important design factor for the image tracker is the speed of the data processing which allows real-time operation of the system and provides reasonably accurate performance at the same time. Use of powerful DSP alone does not guarantee to meet such requirement. In this paper, a simple efficient algorithm for real-time multi-target image tracking is suggested. The suggested method is based on a recursive centroiding technique and color table look-up. This method has been successfully implemented in a image processing system for Micro-Robot Soccer Tournament(MIROSOT). This tracker can track positions of a ball, 3 enemies, and 3 agents at the same time. The experimental results show that the processing time for each frame of image is less than 7ms, which is well within the 60Hz sampling interval for real-time operation.

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CMOS Circuits for Multi-Sensor Interface Custom IC (멀티센서신호 인터페이스용 Custom IC를 위한 CMOS 회로 설계)

  • Jo, Young-Chang;Choi, Pyung;Sohn, Byung-Ki
    • Journal of Sensor Science and Technology
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    • v.3 no.1
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    • pp.54-60
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    • 1994
  • In this paper, the multi-sensor signal processing IC is designed. It consists of an analog multiplexer for selection of multi-sensor signals, active filters for noise rejection and signal amplification, and a sample and hold circuit for interface with digital signal processing. By implementing these circuits with CMOS transistors, integration, low power dissipation and miniaturization of the total signal processing system have been made possible.

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