• Title/Summary/Keyword: Multi-layer dielectric

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Electrical Properties of BaTiO3-based 0603/0.1µF/0.3mm Ceramics Decoupling Capacitor for Embedding in the PCB of 10G RF Transceiver Module

  • Park, Hwa-sun;Na, Youngil;Choi, Ho Joon;Suh, Su-jeong;Baek, Dong-Hyun;Yoon, Jung-Rag
    • Journal of Electrical Engineering and Technology
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    • v.13 no.4
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    • pp.1638-1643
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    • 2018
  • Multi-layer ceramic capacitors as decoupling capacitor were fabricated by dielectric composition with a high dielectric constant. The fabricated decoupling capacitors were embedded in the PCB of the 10G RF transceiver module and evaluated for the characteristics of electrical noise by the level of AC input voltage. In order to further improve the electrical properties of the $BaTiO_3$ based composite, glass frit, MgO, $Y_2O_3$, $Mn_3O$, $V_2O_5$, $BaCO_3$, $SiO_2$, and $Al_2O_3$ were used as additives. The electrical properties of the composites were determined by various amounts of additives and optimum sintering temperature. As a result of the optimized composite, it was possible to obtain a density of $5.77g/cm^3$, a dielectric constant of 1994, and an insulation resistance of $2.91{\times}10^{12}{\Omega}$ at an additive content of 5wt% and a sintering temperature of $1250^{\circ}C$. After forming a $2.5{\mu}m$ green sheet using the doctor blade method, a total of 77 layers were laminated and sintered at $1180^{\circ}C$. A decoupling capacitor with a size of $0.6mm(W){\times}0.3mm(L){\times}0.3mm(T)$ (width, length and thickness, respectively) and a capacitance of 100 nF was embedded using a PCB process for the 10G RF Transceiver modules. In the range of AC input voltage 400mmV @ 500kHz to 2200mV @ 900kHz, the embedded 10G RF Transceiver modules evaluated that it has better electrical performance than the non-embedded modules.

Electrical Characteristics of Piezoelectric Transformer Composition Pb(Sb1/2Nb1/2)-Pb(Ni1/3Nb2/3)O3-Pb(Zr1Ti)O3 Ceramics for Adaptor (Adaptor용 압전트랜스포머조성 Pb(Sb1/2Nb1/2)-Pb(Ni1/3Nb2/3)O3-Pb(Zr1Ti)O3세라믹스의 전기적 특성)

  • 윤광희;오동언;류주현
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.6
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    • pp.499-503
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    • 2002
  • In this study, to develop the high power piezoelectric transformer for adaptor, PSN-PNN-PZT system ceramics were formulated as a function of $MnO_2$ addition and its dielectric and piezoelectric characteristics were investigated. Multi-layer piezoelectric transformer using an excellent composition was also fabricated and its electrical properties evaluated. The composition ceramics added to 0.5wt%$MnO_2$ showed the maximum value of $k_p=0.61$ and $Q_m=1.321$. As the output power of piezoelectric transformer is increased, its temperature rise increased. At the fixed 18W output power, the transformer was stably operated.

High Luminous Efficiency Flat Light Source with Xe mixture Gas Discharge and Areal Brightness Control Method (제논 혼합가스를 이용한 고효율 면광원과 국부적 밝기 제어 방식)

  • Jung, Jae-Chul;Seo, In-Woo;Oh, Byung-Joo;Whang, Ki-Woong
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2009.10a
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    • pp.153-157
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    • 2009
  • A Highly efficient Mercury-free Flat Fluorescent Lamp (MFFL) with dielectric barrier Xe gas discharge was developed for an alternative of conventional line-type Cold Cathode Fluorescent Lamps (CCFLs) which shows a wide voltage margin and a stable discharge operation for diffuse glow discharge with an application of a auxiliary electrode. Electro-optic characteristics of the MFFL were examined through the changes in ambient temperature, total pressure and Xe partial pressure. the single cell is expanded into a multi-structured configuration to realize a large sized lamp by a simple repetition of the single cells, and a new driving scheme is proposed for an adaptive brightness control using dual auxiliary electrodes and bi-polar drive scheme. In addition, interesting application of this ultra high luminance flat lamp by the optimization of the gas condition and the pattern of the rear phosphor layer is suggested as a good alternative of daylight lamp source

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Effect of surface roughness onto the scattering in low loss mirrors (기판의 표면거칠기와 반사경 산란에 대한 연구)

  • 조현주;신명진;이재철
    • Korean Journal of Optics and Photonics
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    • v.13 no.3
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    • pp.209-214
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    • 2002
  • The effect of surface roughness on mirror scattering has been studied. Five kinds of substrates with different surface roughness were fabricated. On those substrates, a dielectric multi-layer coating with high reflectivity was deposited by ion beam sputtering and electron beam evaporation. A total integrated scattering measurement set-up was built for the evaluation of deposited samples. Most of the ion beam sputtered mirrors showed lower scattering than the electron beam evaporated one, which deposited on substrates similar in surface roughness. Over ~2 $\AA$ in surface roughness, scattering strongly depend on the micro-structure of the super-polished surface. The lowest scattering we have achieved is 2.06 ppm by ion beam sputtering from the substrate with surface roughness of 0.23 $\AA$.

A Circular Micro-Strip Patch Antenna Using a PBG (광 밴드 갭(Photonic Band Gap) 구조를 응용한 원형 마이크로스트립 패치 안테나)

  • Lee Bong-Geol;Jung Chun-Suk;Woo Jong-Woon;Ahn Sang-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.11 s.102
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    • pp.1067-1074
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    • 2005
  • Studied antenna's basic structure was circular micro-strip patch antenna. Bandwidth was broaden and back-radiation pattern was decreased because studied antenna had PBG on a ground for improvement in its defect which is skin-effects. And character of antenna according to different shape of PBG was observed. Finally, air-gap whose dielectric constant is lower than substrates was added between substrates sc respond frequency was higher despite small size antenna.

Capacitively Coupled Plasma Simulation for Low-k Materials Etching Process Using $H_2/N_2$ gas (저 유전 재료의 에칭 공정을 위한 $H_2/N_2$ 가스를 이용한 Capacitively Coupled Plasma 시뮬레이션)

  • Shon, Chae-Hwa
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.12
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    • pp.601-605
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    • 2006
  • The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multi-layer interconnections in smaller scales with higher integration density. Low-k materials are applied to the inter-metal dielectric (IMD) materials in order to overcome the RC delay. Relaxation continuum (RCT) model that includes neutral-species transport model have developed to model the etching process in a capacitively coupled plasma (CCP) device. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. For the etching of low-k materials by $N_2/H_2$ plasma, N and H atoms have a big influence on the materials. Moreover the distributions of excited neutral species influence the plasma density and profile. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatio-temporal steady state profile could be obtained.

An Investigation on the Aging Properties of NKN Lead-free Piezoelectric Multi-layer Ceramic Actuators (NKN 무연압전 액추에이터의 신뢰성 연구)

  • Chae, Moon-Soon;Lee, Ku-Tak;Koh, Jung-Hyuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.10
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    • pp.803-806
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    • 2011
  • 1 mol% $Li_2O$ excess $0.9(Na_{0.52}K_{0.48})NbO_3-0.1LiTaO_3$ lead-free piezoelectric multilayer ceramic actuators were investigated to determine their aging properties. To reduce the thermal aging behavior, we applied a rectified unipolar electric field of 5 kV/mm to the specimen to accelerate the electric aging behavior. By employing a rectified unipolar electric field for the piezoelectric actuators, we could remove undesirable heating from the relaxation current in the motion of the ferroelectric domain. To accelerate the aging test, the applied electric fields had a frequency of 900 Hz. To have enough time for charging and discharging, we employed an accurate time constant to design the equivalent circuit model for the aging tester. To extract exact aging behavior, we measured the pseudo-piezoelectric coefficient before and after the aging process. We also measured the electro-mechanical coupling coefficient, the frequency-dependent dielectric permittivity, and the impedance to compare with fresh and aged specimen.

Planar Microstrip Patch Antenna for 5G Wireless Applications

  • Kim, Jang-Wook;Jeon, Joo-Seong
    • Journal of the Korea Society of Computer and Information
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    • v.27 no.1
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    • pp.33-41
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    • 2022
  • This paper describes a planar microstrip patch antenna designed on dielectric substrate. Two types of planar microstrip patch antennas are studied for the 5G wireless applications, one type is conventional microstrip structure, the other type is stacked microstrip structure fed by coaxial probe. Using electromagnetically coupling method, stacked microstrip patch antenna employing a multi-layer substrate structure was designed. The results indicate that the proposed stacked microstrip patch antenna performs well at 5G wireless service bandwith a broadband from 3.42GHz to 3.70GHz. The impedance bandwidth(VSWR≤2) is 360MHz(10.28%) from 3.42GHz to 3.78GHz. In this paper, through the designing of a stacked microstrip patch antenna, we have presented the availability for 5G wireless repeater system.

Millimeter-wave LTCC Front-end Module for Highly Integrated Transceiver (고집적 송수신기를 위한 밀리미터파 LTCC Front-end 모듈)

  • Kim, Bong-Su;Byun, Woo-Jin;Kim, Kwang-Seon;Eun, Ki-Chan;Song, Myung-Sun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.10 s.113
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    • pp.967-975
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    • 2006
  • In this paper, design and implementation of a very compact and cost effective front-end module are presented for IEEE 802.16 FWA(fixed Wireless Access) in the 40 GHz band. A multi-layer LTCC(Low Temperature Co-fred Ceramic) technology with cavity process to achieve excellent electrical performances is used to fabricate the front-end module. The wirebond matching circuit design of switch input/output port and waveguide transition to connect antenna are optimally designed to keep transmission loss low. To reduce the size of the front-end module, the dielectric waveguide filter is developed instead of the metal waveguide filter. The LTCC is composed of 6 layers(with the thickness of a layer of 100 um) having a relative dielectric constant of 7.1. The front-end module is implemented in a volume of $30{\times}7{\times}0.8mm^3$ and shows an overall insertion loss < 5.3 dB, and image rejection value > 49 dB.

Copper Interconnection and Flip Chip Packaging Laboratory Activity for Microelectronics Manufacturing Engineers

  • Moon, Dae-Ho;Ha, Tae-Min;Kim, Boom-Soo;Han, Seung-Soo;Hong, Sang-Jeen
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.431-432
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    • 2012
  • In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

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