• ETRI Journal
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• v.26 no.6
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• pp.635-640
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• 2004

A new low-complexity differential detection technique, fractional multi-bit differential detection (FMDD), is proposed in order to improve the performance of continuous phase modulation (CPM) signals such as Gaussian minimum shift keying (GMSK) and Gaussian frequency shift keying (GFSK). In comparison to conventional one-bit differential detected (1DD) GFSK, the FMDD-employed GFSK provides a signal-to-noise ratio advantage of up to 1.8 dB in an AWGN channel. Thus, the bit-error rate performance of the proposed FMDD is brought close to that of an ideal coherent detection while avoiding the implementation complexity associated with the carrier recovery. In the adjacent channel interference environment, FMDD achieves an even larger SNR advantage compared to 1DD.

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.343-346
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• 2000

This paper presents a filter bank designed for the multi-channel audio equalizer. A time-shared multiplier is also proposed to implement the equalizer with a minimum number of gates when it is synthesized with ASIC or FPGA. Further reduction of the number of required gates is achieved by designing the multiplier based on a cascaded sequential circuit utilizing partial multiplications. The equalizer is realized with FPGA and its real-time operation verifies the reliability and high fidelity of the designed system.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.41-45
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• 2007

Multi-input multi-output (MIMO) system can increase data rate, capacity and bit error rate (BER) performance compare to traditional single antenna system. However MIMO technique is pointed out the problem that has high complexity to design receiver. So a recent trend of research on the MIMO system pays more attention to simplified implementation of receiver structure. In this paper, we propose differential space time block code (STBC) for MIMO system with cyclic delay diversity (CDD). This structure can provide a very close performance to that of the conventional diversity scheme with maximum likelihood (ML) detection without channel estimation block while the receiver structure is highly simplified. Bit error rate (BER) performance of the proposed system is simulated for an AWGN channel by theoretical and simulated approaches. The results of this paper can be applicable to the 4G mobile multimedia communication systems.

• Proceedings of the Korean Society of Computer Information Conference
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• 2019.07a
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• pp.97-98
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• 2019

본 논문에서는 대용량의 방송 콘텐츠를 전송하기 위해 다수개의 채널을 결합하여 안정적이고 고속으로 전송하기 위한 방송콘텐츠를 전송하기 위한 테스트베드를 제안한다. 제안하는 테스트베드의 첫 번째 목적은 하나의 방송채널 용량을 초과하는 대용량 방송 콘텐츠를 다수개의 채널을 결합하여 전송하기 위한 것이며, 두 번째 목적은 다채널로 입력된 데이터를 다양한 방법의 병렬 알고리즘을 적용하여 FPGA에 적용한 후 그 결과를 테스트하기 위한 것이다. 이를 위하여 제안하는 테스트베드는 다채널을 위한 입력 보드와 전반적인 제어를 위한 CPU 보드, 병렬 알고리즘 등을 테스트하기 위한 FPGA 보드, 그리고 3개의 보드들을 연결하기 위한 베이스 보드로 구성되었다. 제안하는 테스트베드 환경에서 다채널 대용량의 데이터를 병렬처리 할 수 있는 병렬 알고리즘들을 지속적으로 개발하고 테스트하여 다채널 대용량의 실시간 처리가 가능한 영상처리 시스템을 개발하는 것이다.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.12
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• pp.584-589
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• 2001

This paper presents an implementation method of multi-channel synchronized phasor measurement device, which is based on the ASIC implementation of the sliding-DFT. A time-shared multiplier structure is proposed to minimize the number of gates required for the implementation. The design is verified by the timing simulation of its operation. The effect of coefficient approximation in the recursive implementation of the sliding-DFT is analytically derived and verified with the computer simulations.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.1
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• pp.18-25
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• 2018

In this paper, we present a low-power implementation of the multi-channel hearing aid system using a general-purpose DSP chip. The system includes an acoustic amplification algorithm based on Wide Dynamic Range Compression (WDRC), an adaptive howling canceller, and a single-channel noise reduction algorithm. To achieve a low-power implementation, each algorithm is re-constructed in forms of integer program, and the integer program is converted to the assembly program using BelaSigna(R) 250 instructions. Through experiments using the implementation system, the performance of each processing algorithm was confirmed in real-time. Also, the clock of the implementation system was measured, and it was confirmed that the entire signal processing blocks can be performed in real time at about 7.02MHz system clock.

• The KIPS Transactions:PartC
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• v.13C no.6 s.109
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• pp.677-684
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• 2006

This paper investigates the link margin of MB-OFDM UWB system quantitatively. Various simulations are performed considering the implementation loss by imperfect synchronization unit and the effect of multi-path fading channels. MB-OFDM UWB system uses ZP(Zero Padding) instead of CP(Cyclic Prefix) and supports two transmission modes; one is TFI(Time Frequency Interleaving) mode that transmits OFDM symbols using different carrier frequency from symbol to symbol according to Time Frequency(TF) codes, the other is FFI(Fixed Frequency Interleaving) mode that transmits OFDM symbols using a specific carrier frequency. The advantage of if and TFI is to be able to increase the transmitting power effectively compared to the existed OFDM systems that transmit the signal continuously at the same average transmitting power. From the analysis results of Ink margin, to guarantee the service range of 4m in 200Mbps mode, TFI mode must necessarily be implemented and the service range of 480Mbps mode is estimated about 1-2m in the line-of-sight multi-path channel (CMI).

• The Journal of the Acoustical Society of Korea
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• v.20 no.8
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• pp.3-11
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• 2001

This paper describes an implementation of inverse filter using SVD in order to recover the input in multi-channel system. The matrix formulation in SISO system is extended to MIMO system. In time and frequency domain we investigates the inversion of minimum phase system and non-minimum phase system. To execute an effective inversion of non-minimum phase system, SVD is introduced. First of all we computes singular values of system matrix and then investigates the phase property of system. In case of overall system is non-minimum phase, system matrix has one (or more) very small singular value (s). The very small singular value (s) carries information about phase properties of system. Using this property, approximate inverse filter of overall system is founded. The numerical simulation shows potentials in use of the inverse filter.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.49 no.5
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• pp.269-277
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• 2000

We propose two new types multi-stage blind clustering equalizers for QAM demoulation, which are called a complex classification algorithm(CCA) and a radial basis function algorithm(RBFA). The CCA uses a clustering technique based on the joint gaussian probability function and computes separately the real part and imaginary part for simple implementation as well as less computation. In order to improve the performance of CCA, the Dual-Mode CCA(DMCCA) incorporates the CCA tap-updating mode with the decision-directed(DD) mode. The RBFA reduces the number of cluster centers through three steps using the classification technique of RBF and then updates the equalizer taps for QAM demodulation. Test results on 16-QAM confirm that the proposed algorithms perform better the conventional multi-state equalizers in the senses of SER and MSE under multi-path fading channel.

• Journal of IKEEE
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• v.27 no.1
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• pp.45-52
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• 2023

Cold-junction correction(CJC) and disconnection detection circuit design of various thermocouples(TC) and multi-channel TC interface circuit using them were designed. The CJC and disconnection detection circuit consists of a CJC semiconductor device, an instrumentation amplifier(IA), two resistors and a diode for disconnection detection. Based on the basic circuit, a multi-channel interface circuit was also implemented. The CJC was implemented using compensation semiconductor and IA, and disconnection detection was detected by using two resistor and a diode so that IA input voltage became -0.42V. As a result of the experiment using R-type TC, the error of the designed circuit was reduced from 0.14mV to 3㎶ after CJC in the temperature range of 0℃ to 1400℃. In addition, it was confirmed that the output voltage of IA was saturated from 88mV to -14.2V when TC was disconnected from normal. The output voltage of the designed circuit was 0V to 10V in the temperature range of 0℃ to 1400℃. The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel. The implemented multi-channel interface has a feature that can be applied equally to E, J, K, T, R, and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.