• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.3C
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• pp.278-286
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• 2010

Motion Compensated Frame Interpolation(MCFI) has been used to reduce motion jerkiness for dynamic scenes and motion blurriness for LCD-panel display as post processing for large screen and full HD(high definition) display. Conventionally, block matching algorithms (BMA) are widely used to do motion estimation for simplicity of implementation. However, there are still several drawbacks. So in this paper, we propose a novel shape-based ME algorithm to increase accuracy and reduce ME computational cost. To increase ME accuracy, we do motion estimation based on shape of moving objects. And only moving areas are included for motion estimation to reduce computational cost. The results show that the computational cost is 25 % lower than full search BMA, while the performance is similar or is better, especially in the fast moving region.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.10
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• pp.1845-1852
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• 2008

The key elements of inter prediction are motion estimation(ME) and motion compensation(MC). Motion estimation is to find the optimum motion vectors, not only by using a distance criteria like the SAD, but also by taking into account the resulting number of 비트s in the 비트 stream. Motion compensation is compensate for movement of blocks of current frame. Inter-prediction Encoding is always the main bottleneck in high-quality streaming applications. Therefore, in real-time streaming applications, dedicated hardware for executing Inter-prediction is required. In this paper, we studied a motion estimator(ME) for H.264/AVC. The designed motion estimator is based on 2-D systolic array and it connects processing elements for fast SAD(Sum of Absolute Difference) calculation in parallel. By providing different path for the upper and lower lesion of each reference data and adjusting the input sequence, consecutive calculation for motion estimation is executed without pipeline stall. With data reuse technique, it reduces memory access, and there is no extra delay for finding optimal partitions and motion vectors. The motion estimator supports variable-block size and takes 328 cycles for macro-block calculation. The proposed architecture is local memory-free different from paper [6] using local memory. This motion estimation encoder can be applicable to real-time video processing.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.811-812
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• 2008

In this paper, a modified cross search algorithm for fast block matching motion estimation is proposed. Various Motion Estimation (ME) algorithms have been proposed since ME requires large computational complexity. The proposed algorithm employs Modified Cross Search Pattern (MCSP) to search the motion vector. Efficient compression can be achieved since Modified Cross Search Algorithm (MCSA) simplifies the search pattern to reduce the computational complexity. The experimental results show that proposed algorithm reduces the search points up to 29% compared to conventional methods.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.159-166
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• 2013

This paper proposes an efficient loop accelerator for a motion estimation specific instruction-set processor. ME algorithms in nature contain complex and multiple loop operations. To support efficient hardware (HW) loop operations, this paper introduces four loop instructions and their specific HW architecture. The simulation results show that the proposed loop accelerator can reduce about 29% average instruction cycles for ME early-termination schemes compared with typical implementation having a combination of compare and conditional jump instructions. The proposed loop accelerator of the motion estimation specific instruction-set processor can significantly reduce the number of program memory accesses and greatly save power consumption. Hence, it can be quite suitable for low power and flexible ME implementation.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.3
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• pp.18-27
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• 2009

In this paper, we propose a frame rate conversion algorithm using adaptive search-based motion estimation (ME). The proposed ME method uses recursive search, 3-step search, and single predicted search as candidates for search strategy. The best method among the three candidates is adaptively selected on a block basis according to the predicted motion type. The adaptation of the search method improves the accuracy of the estimated motion vectors while curbing the increase of computational load. To support the proposed ME method, an entire image is divided into three regions with different motion types. Experimental results show that the proposed FRC method achieves better image quality than existing algorithms in both subjective and objective measures.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.87-90
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• 2003

This paper presents a variable block size motion estimation (ME) algorithm and hardware architectures dedicated to H.264/AVC. Proposed ME architecture can achieve real-time processing for 720$\times$480@30Hz with search range of [-64, +63] in the horizontal and [-32, +31] in the vertical direction at integer-pel accuracy and upto 7 reference frames at the operating frequency of 54MHz.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.639-642
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• 2005

Motion Estimation(ME) is an important part of video compression, because it requires a large amount of computation. Half-pixel and quarter-pixel motion estimation allows high video compression rates but it also has high computation complexity. In this paper we suggest a new and efficient motion estimation algorithm for half-pixel and quarter-pixel motion estimation using SAD values. In the method, an integer-pixel motion vector is found and then only three neighboring points of the integer-pixel motion vector is evaluated to find the half-pixel motion vector. The quarter-pixel motion vector is also found by using a similar method. Experimental results of our method shows 20% reduction in computation time, when compared with those of a conventional method, while producing same quality motion vectors.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6C
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• pp.459-470
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• 2008

In this paper, we propose a fast ME (motion estimation) algorithm for MPEG-4 to H.264 Transcoder. Whereas 2 modes ($8{\times}8$, $16{\times}16$) are used for ME in MPEG-4 simple profile, ME using 7 modes is supported for further enhanced coding efficiency in H.264. The transcoding speed is affected dominantly by the computational complexity of encoder part in transcoder, where ME module of H.264 encoder has high complexity due to using 7 modes. In order to increase the speed of transcoding between MPEG-4 and H.264, we use 3 PMVs (predicted motion vectors) and the mode information of MBs (macroblocks) provided from the decoder part of transcoder. Since the proposed 3 PMVs are very close to an optimal motion vector, and we consider only some restricted modes according to the MB information transferred from decoder part, the proposed scheme can speed up the transcoding procedure without loss of image quality. We show experimental results which demonstrate the effectiveness of the proposed algorithm, where performance of our scheme is compared with that of the conventional fast algorithm for H.264.

• Journal of Broadcast Engineering
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• v.16 no.2
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• pp.293-304
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• 2011

In this paper, we proposed a new hardware architecture for motion estimation (ME) which is the most time-consuming unit among H.264 algorithms and designed to the type of intellectual property (IP). The proposed ME hardware consists of buffer, processing unit (PU) array, SAD (sum of absolute difference) selector, and motion vector (MVgenerator). PU array is composed of 16 PUs and each PU consists of 16 processing elements (PUs). The main characteristics of the proposed hardware are that current and reference frames are re-used to reduce the number of access to the external memory and that there is no clock loss during SAD operation. The implemented ME hardware occupies 3% hardware resources of StatixIII EP3SE80F1152C2 which is a FPGA of Altera Inc. and can operate at up to 446.43MHz. Therefore it can process up to 50 frames of 1080p in a second.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2009.01a
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• pp.321-325
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• 2009

Sub-pel level motion estimation contributes to significant increase in R-D performance for H.264|MPEG 4 Part 10 AVC. However, several supplements, such as interpolation, block matching, and Hadamard transform which entails large computational complexity of encoding process, are essential to find best matching block in sub-pel level motion estimation and compensation. In this paper, a fast motion estimation scheme in sub-pel accuracy is proposed based on a parabolic model of SAD to avoid such computational complexity. In the proposed scheme, motion estimation (ME) is only performed in integer-pel levels and the following sub-pel level motion vectors are found from the parametric SAD model for which the model parameters are estimated from the SAD values obtained in the integer-pel levels. Fall-back check is performed to ensure the validity of the parabolic SAD model with the estimated parameters. The experiment result shows that the proposed scheme can reduce the motion estimation time up to about 30% of the total ME times in average with negligible amount of PSNR drops (0.14dB in maximum) and bit increments (2.54%in maximum).