• Transactions on Electrical and Electronic Materials
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• 제13권2호
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• pp.73-77
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• 2012

Operation of liquid crystal displays (LCDs) can be improved by monolithic integration of the pixel transistors with light emitting diodes (LEDs) on a single substrate. Conventional LCDs make use of filters to control the backlighting which reduces the overall efficiency. These LCDs also utilize LEDs in series which impose failure and they require high voltage for operation with a power factor correction. The screen of small hand-held devices can operate from moderate brightness. Therefore, III-V nanowires that are grown along with transistors over Silicon substrates can be utilized. Control of nanowire LEDs with nanowire transistors will significantly lower the cost, increase the efficiency, improve the manufacturing yield and simplify the structure of the small displays that are used in portable devices. The steps to grow nanowires on Silicon substrates are described. The vertical n-type and p-type nanowire transistors with surrounding gate structures are characterized. While biased at 0.5 V, nanowire transistors with minimum radius or channel width have an OFF current which is less than 1pA, an ON current more than 1 ${\mu}A$, a total delay less than 10 ps and a transconductance gain of more than 10 ${\mu}A/V$. The low power and fast switching characteristics of the nanowire transistor make them an ideal choice for the realization of future displays of portable devices with long battery lifetime.

• ETRI Journal
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• 제27권1호
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• pp.89-94
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• 2005

This paper describes a low-loss, compact, 40-channel arrayed waveguide grating (AWG) which utilizes a monolithically integrated spot-size converter (SSC) for lowering the coupling loss between silica waveguides and standard single-mode fibers. The SSC is a simple waveguide structure that is tapered in both the vertical and horizontal directions. The vertically tapered structure was realized using a shadow-mask etching technique. By employing this technique, the fabricated, 40-channel, 100 GHz-spaced AWG with silica waveguides of 1.5% relative index-contrast showed an insertion-loss figure of 2.8 dB without degrading other optical performance.

• ETRI Journal
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• 제35권3호
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• pp.459-468
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• 2013

A novel integrated laser, that is, a distributed reflector laser diode integrated with an electroabsorption modulator, is proposed to improve the output efficiency, single-mode stability, and chirp. The proposed laser can be realized using the selective metalorganic vapor phase epitaxy technique (that is, control of the width of the insulating mask), and its fabrication process is almost the same as the conventional electroabsorption modulated laser (EML) process except for the asymmetric coupling coefficient structure along the cavity. For our analysis, an accurate time-domain transfer-matrix-based laser model is developed. Based on this model, we perform steady-state and large-signal analyses. The performances of the proposed laser, such as the output power, extinction ratio, and chirp, are compared with those of the EML. Under 10-Gbps NRZ modulation, we can obtain a 30% higher output power and about 50% lower chirp than the conventional EML. In particular, the simulation results show that the chirp provided by the proposed laser can appear to have a longer wavelength side at the leading edge of the pulse and a shorter wavelength side at the falling edge.

• 마이크로전자및패키징학회지
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• 제11권2호
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• pp.43-47
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• 2004

전력 결합기 및 전력 배분기는 마이크로파 수동 소자의 일종으로 전력을 결합하거나 나눌 때 쓰이는 것이다. 최근의 정보통신 시스템의 추세를 보아 수동 소자의 집적화 및 소형화가 요구된다. 본 연구에서는 이러한 추세를 감안하여 2012 크기의 다층 구조를 적용한 양대역 방향성 결합기를 저온 동시소성 기술을 활용하여 제작하였다. DCS(Digital communication system)와 EGSM(European global system for mobile) 대역에서 각기 원하는 커플링을 얻기 위해서 수직 결합 패턴들을 다층 구조에 적용하였다. 제작된 방향성 결합기의 결합성, 삽입 손실, 격리성 및 방향성 등의 특성들을 측정하였고 시뮬레이션 결과들과 비교 고찰하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1062-1065
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• 2002

We demonstrate the MMIC(monolithic microwave integrated circuit) frequency doublers generating stable and low-cost 29 ㎓ local oscillator signals from 14.5 ㎓ input signals. These devices were designed and fabricated by using the MMIC integration process of 0.1 $\mu\textrm{m}$ gate-length PHEMTs (pseudomorphic high electron mobility transistors). The measurements showed S$\_$11/ of -9.2 dB at 14.5 ㎓, S/sub22/ of -18.6 dB at 29 ㎓ and a minimum conversion loss of 18.2 dB at 14.5 ㎓ with an input power of 6 dBm. The fundamental signal of 14.5㎓ was suppressed below 15.2 dBc compared with the second harmonic signal at the output port, and the isolation characteristics of the fundamental signal between the input and the output port were maintained above 30 dB in the frequency range of 10.5 ㎓ to 18.5 ㎓.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2017년도 춘계학술대회
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• pp.200-201
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• 2017

이 논문은 3D 순차적 CMOS 인버터 회로의 전기적 상호작용을 고려한 시뮬레이션을 제시하고자 한다. 상층 NMOS는 BSIM-IMG, 하층 PMOS에는 LETI-UTSOI 모델을 사용하여 전기적 상호작용이 잘 반영되는지 TCAD 데이터와 SPICE 데이터를 비교하였다. 트랜지스터 간의 높이가 작을 때 하층 게이트의 전압의 변화에 따라 상층 전류-전압 특성에 전기적 상호작용이 잘 반영되는 것을 확인하였다.

• 토지주택연구
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• 제1권1호
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• pp.59-65
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• 2010

The paper presents a comparison between a semi-implicit time integration linear finite element implementation and fully-implicit nonlinear Newton-Raphson finite element implementation of a triphasic small strain mixture formulation of an elastic partially saturated porous medium. The pore air phase pressure pa is assumed atmospheric, i.e., $p_a$ = 0, although the formulation and implementation are general to handle increase in pore air pressure as a result of loading, if needed. The solid skeleton phase is assumed linear isotropic elastic and partially saturated 'consolidation' in the presence of surface infiltration and traction is simulated. The verification of the implementation against an analytical solution for partially saturated pore water flow (no deformation) and comparison between the two implementations is presented and the important of the porosity-dependent nature of the partially saturated permeability is assessed on comparison with a commercial code for the partially saturated flow with deformation. As a result, the response of partially saturated permeability subjected to the porosity influences on the saturation of a soil, and the different behaviors of the partially saturated soil between staggered and monolithic coupled programs is worth of attention because the negative pore water pressure in the partially saturated soil depends on the difference.

• 한국전기전자재료학회논문지
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• 제37권1호
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• pp.26-35
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• 2024

Aluminum-induced crystallization (AIC) as a route to reduce the fabrication cost and to obtain polycrystalline Si (p-Si) thin-film of large grain size is a promising alternative of single-crystalline (s-Si) substrate or p-Si thin-film obtained by conventional methods such as solid phase crystallization (SPC) and laser-induced crystallization (LIC). As the AIC process occurs at the interface between a-Si and Al thin-films, there are various process and interface parameters. Also, it directly means that there is a certain parametric window to obtain p-Si of large grain size having uniform crystal orientation. In this article, we investigate the effect of the various process and interface parameters to obtain p-Si of large grain size and uniform crystal orientation from the literature review. We also suggest the potential use of the p-Si as a virtual substrate for the growth of various compound semiconductors in a form of low-dimension as well as thin-film as a way for their monolithic integration on Si.

• 대한전자공학회논문지TC
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• 제38권11호
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• pp.63-70
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• 2001

밀리미터파 대역에서 안정적이고 경제적인 local oscillator (LO) 신호를 생성하기 위한 주파수 체배기를 설계 및 제작하였다. 주파수 체배기는 14.5 GHz를 입력받아 29 GHz를 생성하도록 설계되었으며, 측정 결과 14.5 GHz에서 S11이 -9.2 dB, 29 GHz에서 S22가 -18.6 dB 로 입력 측은 14.5 GHz에, 출력 측은 29GHz에 매칭이 되었다. 변환손실의 경우 14.5 GHz에서 입력전력 6 dBm일 때 최소 값인 18.2 dB를 보였으며, 출력 단에서의 주파수 스펙트럼 특성은 14.5 GHz에서 15.2dB의 값을 나타내었다. 또한 입력신호의 isolation특성은 10.5 GHz에서 18.5GHz까지 주파수 범위에서 30 dB이상의 값을 보였다. 제작된 MMIC(Microwave monolithic integrated circuits) 주파수 체배기의 칩 사이즈는 $1.5{\times}2.2\;mm^2$이다.

• 대한전자공학회논문지SD
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• 제43권12호
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• pp.40-46
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• 2006

본 연구에서는 GaAs/AlGaAs 구조의 수직 구조 레이저 - 완전 공핍 광 싸이리스터를 제작하여, 광 논리 및 광 스위칭 시스템에 응용할 수 있는, 광 AND- 와 OR- 게이트를 구현하였고, 그 특성을 측정, 분석하였다. 제작된 단일 소자 타입의 광 싸이리스터는 하나의 소자에서 간단한 기준 스위칭 전압의 변화만으로 광 AND 와 OR 게기트를 모두 구현할 수 있다는 장점을 갖는다. 활성층 위, 아래에 1/4 파장 거울층 구조를 채택하고, 선택적 산화공법을 이용하여 0.65 mA의 낮은 문턱전류 값을 얻었고, 50dB 이상의 높은 온/오프 대비를 보였으며, 높은 광 출력 효율과 입력 광 신호에 대한 높은 선택도를 얻을 수 있었다. 제작된 광 싸이리스터는 실험적으로 S자형의 전류-전압 특성곡선을 얻었고, 빛의 세기가 증가함에 따라 스위칭 전압이 5.20V에서 1.90V로 현저히 줄어드는 것을 확인하였다