• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.4
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• pp.37-42
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• 1984

In this paper, effective methods of symbol timing in a 9600 bps modem are presented. The symbol timing circuit consists of a square-low device followed by a high-Q narrow band-pass filter tuned to a symbol frequency. Also, the advantages of using a digital phase-tooted loop (DPLL) to suppress side tones are described, and statistical properties of timing wave are derived. In addition, the overall performances of the symbol timing circuit are verified by computer simulation.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.109-110
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• 2006

The performance of a digital baseband signal processing and data transmission rate depends on the modulation technique. In this paper, We implemented DSP communication system for Underwater acoustic communication using by adaptive BPSK modem technique. In order to implement adaptive modem, we suggested SNR detection block. SNR detection block has the reference SNR value that selects between window filter path and matched filter path. In this paper, suggested system is based on software interface and all Hardware(PLL, modem filter, equalizer etc) is implemented by software, exclusive of DSP, A/D, D/A converter, SDRAM and Flash memory.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.97-100
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• 2003

The quasi-complementary turbo codes (QCTC) proposed by Kim [1] is used for a fast hybrid ARQ scheme with incremental redundancy and adaptive modulation coding in the cdma2000 1xEV-DV [2]. The QCTC provides various code rates with good performance, a very simple encoder structure, and an inherent channel interleaving. It is shown that the QCTC is a unified scheme of channel coding and channel interleaving. In this paper, we introduce the properties of QCTC and various hybrid ARQ-QCTC schemes for the system.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.220-229
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• 1996

We presetn sytem-level simulation methodology as well as environment setup established for CDMA digtial cellular mobile station in an effort to verify CDMA modem ASIC design. To make the system-level simulation feasible, behavioral modeling of a microcontroller was first carried out with VHDL. In addition, models written in C language were also developed to provide ASIC with realistic input data. Finally, the netlist of CDMA modem ASIC was loaded on the a hardware accelerator, which was interfaced with VHDL simulator, and ismulation was performed by excuting the actual CDMA call processing software. Simulation resutls thus obtained were confirmed by comparing them with the emulation resutls from the actual system constructed on hardware modeler. these methods were proved to be effective in both discovering in advance malfunctions when embedded in the system or design errors of ASIC and reducing simulation time by a factor of as much as 20 in case of simulation at gate-level.

• Journal of Digital Contents Society
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• v.7 no.2
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• pp.109-115
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• 2006

In this paper, we design and performance evaluate the equalizer for S-DMT table modem, which supports more channels and better quality symmetric mutimedia services over HFC network. We verified that both of the designed equalizers show good convergence characteristics and that the performance of the time domain equalizer is 1 dB better than that of the frequency domain equalizer overall range of Eb/No.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.11
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• pp.19-31
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• 1996

Spread spectrum method gurantees good performance in digital communication system under multi-path interference and jamming signals. The purpose of this paper is to develop the wireless modem using DS/SS techinque. The transceiver consists of a spread spectrum DQPSK transmitter and a mtching receiver. The system operates with the chipping rate set to 4 Mcps and the number of chips/symbol at 64, making the data rate 62.5 Kbps using QPSK modilation. The receiver section uses a digital matched filter for fast acquisition of burst signals and uses the comparing the BER of proposed system iwth that of narrow bnd system under various additive white gaussian noises. It is showen that the proposed sysem has better performance than narrow band system. When jamming signals is added to the suggested DS/SS system, we also show that the experimental performance (BER) of the suggested wireless modem is almost same as theroretical performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.69-77
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• 2002

In this paper, we present the CDMA2000 1x compliant mobile station modem chip (SCom5010) implemented in a 0.18${\mu}{\textrm}{m}$ CMOS technology.[1] ARM940T cached processor. TeakLite DSP core, and other peripheral blocks are integrated with the baseband modem chip. Also we show novel verification methodologies and explain how this chip can be used as an emulation processor.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.8
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• pp.1-7
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• 1997

In tis paper, w eproposed a modeling for direct-sequence spread communication base band modem in RT-level VHDL and implemented in a one-chip VLSI and tested. The transmitter modulates with DQPSK modulation method and spreads a modulated signal with 32-bit PN code into 1.152MHz. The receiver de-spreads a signal using 32-tap matched filter and recovers with DQPSK demodulation method. The digital frequency synthesizer generates the sine signal and the cosine signal of 2.304MHz with ROM tables in the size of 7$\^$*/256 and 6$\^$*/256, respectively. The implemented VLSI has been verified a BER with 10$\^$-4/ at E$\_$b//N$\_$o/ of 13dB with a SPW fixed design model and fabricated in the 0.8.mu.m KG6423 gate array with a VHDL model.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.207-209
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• 1995

The PID controller is widely used due to its fast response and robustness. But its performance is not so good compared with modem controllers such as adaptive, robust, fuzzy, neural controller. Therefore, it is natural to replace PID controller by modem controllers. But, the problem is that modem controller can not be easily applied to the real time process. Hence, this paper proposes such a structure that PID controller and Self-Learning Fuzzy Controller(SLFC) are in parallel with each other. The parameter of SLFC will be updated by gradient descent method using neuro - identifier. The usefulness of this hybrid controller will be proved by simulation results.

• Archives of design research
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• v.21
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• pp.55-64
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• 1997

This paper is a study on the 'primitivism' which is constantly being applied on modem and contemporary textile design as a aItanative expression of the serious environmental phenomena of materialism. Starting with the analyzation of the 'concept of primitivism' , this paper is to research the 'origin of primitivism' which was first recognized by the modem artists. Primitivism on modem textile design will be suggested through 'trend terms'. The purpose of this paper is to be a basic material source for the creative development in design as well as to be of help in development of theoretical the study on contemporary textile design.