• 제목/요약/키워드: Mode-lock

검색결과 79건 처리시간 0.028초

Numerical Analysis of Unsteady Flow around a Transversely Oscillating Circular Cylinder

  • Moon, Ji-Soo;Kim, Jae-Soo
    • International Journal of Aeronautical and Space Sciences
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    • 제13권1호
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    • pp.27-33
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    • 2012
  • The relationship between the excitation frequency and the vortex shedding frequency is analyzed during the oscillation of the circular cylinder. Two-dimension unsteady Navier-Stoke's equation is calculated by using the Optimized High Order Compact (OHOC) scheme. The flow condition is Mach number 0.3 and Reynold's number 1000. From the results acquired by calculation, it can be inferred that, when the excitation frequency is near the vortex shedding frequency at the fixed cylinder wake, the oscillation frequency of lift and drag coefficients appears to lock-on. The lock-on refers to a phenomenon in which the aerodynamic coefficient appears as one primary oscillation frequency through excitation and its amplitude is amplified. In the non-lock-on zone, the excitation frequency is not in the lock-on mode anymore and beat is formed in which two or more primary oscillation frequencies of the aerodynamic coefficient are mixed together.

5속 A/T용 자동변속기 토크컨버터 댐퍼클러치 슬립제어가 슬림율과 연비에 미치는 영향 (Effect of Slip-Controlled Torque Converter Damper Clutch in 5-Speed Automatic Transmission on Slip Rate and Fuel Economy)

  • 이기수;김덕중;김현철;나병철;허형석;이호길;장재덕
    • 한국자동차공학회논문집
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    • 제17권3호
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    • pp.74-80
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    • 2009
  • The objective of this paper was to investigate the slip rate and the slip frequency number of damper clutch of torque converter in 2.4L passenger vehicle with 5-speed A/T and analyze the effect of slip control and control strategy on driving characteristics and the fuel economy. The newly developed torque converter with the more durable wet friction material and the slip-controlled damper clutch system, the DCC system, was installed, which was easily compatible and amendable of the lock-up clutch of the base system. The vehicle has been tested on the fuel economy modes such as FTP-75, HWFET and NEDC (ECE15+EUDC) driving cycle at chassis dynamometer. The DCC mode (II), of which the control strategy had both the lock-up and the slip-controlled clutch, and the DCC mode (I) with full slip-controlled clutch were compared with the base system with only the lock-up clutch. As the research result, comparison to base system, the fuel consumption of the vehicle with the DCC control (II) was effectively improved by 6.6% and 7.7% on FTP-75 and NEDC mode.

Optimal Sliding Mode Control of Anti-Lock Braking System

  • Ebrahimirad, H.;Yazdanpanah, M. J.;Kazemi, R.
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2004년도 ICCAS
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    • pp.1608-1611
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    • 2004
  • Anti-lock brake systems (ABS) are being increasingly used in a wide range of applications due to safety. This paper deals with a high performance optimal sliding mode controller for slip-ratio control in the ABS. In this approach a sliding surface square is considered as an appropriate cost function. The optimum brake torque as a system input is determined by minimizing the cost function and used in the controller. Simulation results reveal the effectiveness of the proposed sliding mode controller.

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Antl-Lock Brake System Control for Buses Based on Fuzzy Logic and a Sliding-Mode Observer

  • Park, Jong-Hyeon;Kim, Dong-Hee;Kim, Yong-Ju
    • Journal of Mechanical Science and Technology
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    • 제15권10호
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    • pp.1398-1407
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    • 2001
  • In this paper an anti-lock brake system (ABS) for commercial buses is proposed based on a fuzzy-logic controller and a sliding-mode observer of the vehicle speed. The brake controller generates pulse width modulated (PWM) control inputs to the solenoid valve of each brake, as a function of the estimated wheel slip ratio. PWM control inputs at the brakes significantly reduce chattering in the brake system compared with conventional on-off control inputs. The sliding-mode observer estimates the vehicle speed with measurements of wheel speed, which is then sed to compute the wheel slip ratio. The effectiveness of the proposed control algorithm is validated by a series of computer simulations of bus driving, where the 14-DOF bus model is used.

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상용 ABS와 성능비교를 통한 슬라이딩 모드 제어기의 제동성능 분석 (Brake Performance Analysis of Sliding Mode Controller by Comparing with a Commercial Anti-lock Brake System)

  • 윤득선;백승환;김흥섭;송정훈;부광석
    • 한국자동차공학회논문집
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    • 제18권2호
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    • pp.14-23
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    • 2010
  • This paper analyzes braking performance of ABS with Sliding Mode Controller, which is designed in this research and compared with that of a commercial ABS-ECU only. HILS system for this paper has an existing hydraulic brake line with an ECU of commercial passenger vehicle and it is designed to be cooperated with Sliding Mode Controller and hydraulic line. This paper shows the simulation results to meet the target slip ratio on the various road conditions and displays the performance with Sliding Mode Controller has an improvement than a commercial ABS.

삼상 자속구속형 한류기의 동작모드분석 (The Analysis of Operation Mode of Three-Phase Flux-Lock Type Superconducting Fault Currents Limiter)

  • 황종선;최효상;박형민;조용선;이나영;남긍현;한태희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 영호남 합동 학술대회 및 춘계학술대회 논문집 센서 박막 기술교육
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    • pp.46-48
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    • 2006
  • We investigated the analysis of operation mode of three-phase flux-lake type superconducting fault current limiter(SFCL). The structure of the integrated three-phase flux-lock type SFCL consisted of three-phase flux-lock reactor wound on an iron core with the same turn between coil 1 and coil 2 in each phase. When the SFCL is operated under the normal condition, the flux generated in the iron core is zero because the flux generated between two coils of each single phase is canceled out. Therefore, the SFCL's impedance is zero and the SFCL has negligible influence on the power system, However, if a fault occurs in any single-phase among three phases, the flux generated in the iron core is not zero any more. The flux makes elements of all phase-quench irrespective of the fault type, which reduces the current of fault phase as well as the current of sound phase.

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Quantum Dot Based Mode-Locked Diode Lasers and Coherent Buried Heterostructure Photonic Crystal Nano Lasers

  • 김지명
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.122-122
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    • 2013
  • In this talk, some optical properties of quantum dot based mode-locked diode lasers and photonic crystal nano lasers will be discussed. Linewidth enhancement factor, chirp and interband injection locking technique of quantum dot mode-locked lasers will be presented. Also various types of photonic crystal buried heterostructure lasers toward coherent nano laser will be covered as well.

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플래시 메모리 기기를 위한 다중 버전 잠금 기법 (Multi-version Locking Scheme for Flash Memory Devices)

  • 변시우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 심포지엄 논문집 정보 및 제어부문
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    • pp.191-193
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    • 2005
  • Flash memories are one of best media to support portable computer's storages. However, we need to improve traditional data management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient data processing. F2PL improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process.

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High-Order QAM에 적합한 반송파 동기회로 설계 - II부. 자동모드전환시점 검출기 및 평균모드전환회로를 적용한 Gear-Shift PLL 설계 및 성능평가 (Design of Carrier Recovery Circuit for High-Order QAM - Part II : Performance Analysis and Design of the Gear-shift PLL with ATC(Automatic Transfer-mode Controller) and Average-mode-change Circuit)

  • 김기윤;김신재;최형진
    • 대한전자공학회논문지TC
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    • 제38권4호
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    • pp.18-26
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    • 2001
  • 본 논문에서는 극성 판단(Polarity Decision) PD를 이용하여 모드 변환과 루프이득(Loop Gain)의 변환시점을 자동적으로 검출해 주는 ATC(Automatic Transfer mode Control)알고리즘을 설계하고 모드 전환시 안정적으로 주파수 오프셋을 추정하는 평균방식 Gear-shift PLL을 설계하였다. 제안하는 모드 전환 시점 검출 알고리즘인 ATC 알고리즘은 종전의 QPSK방식에 적용되던 Lock Detector 알고리즘보다 구현이 매우 간단하며 정확하게 모드 전환시점을 검출한다. 또한 Shift Register에 저장했던 주파수 추정 값들을 평균하는 평균전환방식은 모드 전환시 낮은 주파수 추정 에러값으로 다음 모드에서의 빠른 추적 성능을 가능하게 한다. 본 논문에서 제안하는 알고리즘은 적은 회로 면적과 고속 처리가 가능하도록 설계되어 ASIC 설계에 매우 유용하다. 아울러 본 논문에서는 극성판단 PD를 적용하여 위상 포착 및 추적 성능평가를 수행하고 성좌도(constellation)를 각 모드별로 분석하였다.

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