• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.5
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• pp.657-662
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• 2013

A size-reduced high frequency mixer designed by adopting artificial dielectric substrate is described in this work. The artificial dielectric substrate is composed by stacking the lower substrate in which a lot of metalized via-holes exist, and upper substrate on which microstrip lines are realized. The effective dielectric constant increases due to the inserted lots of via-holes, and this may be applied to size-reduction of high frequency circuits. In this work, in order to present an application example of size-reduction for active high frequency circuits using the artificial dielectric substrate, a 8GHz single gate mixer is miniaturized and measured. It is described that the basic circuit elements for mixers such as hybrid, low pass filter, and matching networks can be replaced by the artificial dielectric substrate for size-reduction. The final mixer has 55% of size compared to the normal one. The measured average conversion gain is around 3dB which is almost similar result as the normal circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.186-189
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• 2000

In this paper, we have designed a bandpass filter to apply the downconverter of the K-band Mu-hung-hwa satellite. To pass only the 25-30% of the bandwidth at the center frequency of 19.6GHz, we have designed a six-order interdigital bandpass filter using microstrip lines. Simulation result of optimization show that insertion loss is -0.275dB and reflection coefficient is -20.95dB at the passband frequency. measurement is determined center frequency, 19.150Hz, insertion loss, -4.1dB, input reflection coefficient. -l5dB and output reflection coefficient -l6dB.

• The Journal of the Korea institute of electronic communication sciences
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• v.2 no.4
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• pp.199-202
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• 2007

In this paper, we examined the operating principle of a passive tag antenna for RFID system in UHF band. Based on the study, we proposed a novel RFID tag antenna which adopts the inductively coupled feeding structure to match antenna impedance to a capacitively loaded commercial tag chip. The proposed tag antenna consists of microstrip lines on a thin PET substrate for low-cost fabrication. The detail structure of the tag antenna were optimized using a full electromagnetic wave simulator of IE3D in conjunction with a Pareto genetic algorithm, and the size of the tag antenna can be reduced up to kr=0.27(2 cm2). We built some sample antennas and measured the antenna characteristics such as a return loss, an efficiency, and radiation patterns. The readable range of the tag antenna with a commercial RFID system showed about 1 to 3 m.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.5
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• pp.63-68
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• 2004

This paper presents a design of 12㎓ VCBRO(voltage controlled dielectric resonator oscillator) using a novel PBG(photonic band gap) ground plane and a varactor circuit that enhances the frequency linearity of VCO with different bias to varactors. The PBG structures are used for suppressing the second and third harmonics without any filters. To simulate the accurate resonating frequency, a DR coupled with microstrip lines is analysed by FTM(finite element method) simulation, and the results are transformed into scattering parameters to design the VCO. Some measured results are presented to show the usefulness of the proposed techniques.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.2
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• pp.107-115
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• 1997

In this paper, a 23 GHz push-push oscillator was designed and fabricated for 23 GHz point-to-point communication using split ring resonator. The split ring resonator was equivalent circuit and numerical method of MPIE(Mixed Potential Integral Equation). The analysis of split ring resonator which coupled between microstrip lines was carried out with transmission-mode using this results. The fabricated oscillator showed the output power of 4 dBm, the 1'st harmonic suppression of -20 dBc, the 3rd harmonic suppression of -34 dBc, a SSB phase noise of -109 dBc / Hz at 1MHz offset frequency from the carrier was achieved and 1.4 percents efficiency at 23 GHz. The experimental outputs were in good results with the theoretical and simulated results.

• International Journal of Contents
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• v.2 no.1
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• pp.29-33
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• 2006

The common-source low noise amplifier(LNA) with inductive degeneration using a genetic algorithm is designed and tested for a down converter in an industrial, scientific and medical (ISM) band application and a wireless broadband internet service (WiBro). The genetic algorithm optimizes the reflection coefficients to be well matched the input and output ports between multistage transistor amplifiers, and it generates low voltage standing wave ratio as well as gain flatness of the amplifier. The stability and the gain flatness of the LNA have been improved by combining the matching circuits and the series feedback microstrip lines with inductive degeneration at common-source port. In the frequency range of ISM band and WiBro application operating at $2.3GHz{\sim}2.5GHz$, the measured power gain and maximum voltage standing wave ratio (VSWR) of the LNA are $41{\pm}0.5dB$ and 1.3, and the noise figure of the LNA is lower than 0.85dB. The above results are agreed well with the theoretical values of the amplifiers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.6
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• pp.579-589
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• 1989

In this paper, planar power dividers/combiners for millimeter waves K-band or bands which can be printed on the substrates of hybrid or monolithic IC by surface mounting are designed and studied. Power dividers/combiners, and the conductor loss of microstrip lines in particualr the existing Wilkinson power dividers/combiners is modified ad amployes by ist equivalent circuit. Microwave CAD program SUPEROMPACT is employed for the Wilkinson power combiner which is modified and analyzed to reduce the high frequency coupling between the branches of the combiner, and the method to diminish the sensitivity of the input reflection of $2^n$-way power dividers/combiners is studied employing the commerical microwave CAD program package SUPERCOMPACT.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.12A
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• pp.1214-1218
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• 2010

A new compact UWB bandpass filter with sharp-rejection and low insertion-loss is designed in this paper, using the parallel transmission line with SIR structure. An Example filter is firstly theoretically designed by the proposed synthesis procedure, the optimized by EM simulator, fabricated in microstrip line and finally characterized by a network analyzer. A good agreement between the simulation results and prototype validates the proposed UWB bandpass filter. The designed filter also realized a sharp rejection of higher order with a relatively small size which is proper for the UWB communication system.

• Progress in Superconductivity
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• v.4 no.1
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• pp.74-79
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• 2002

High-speed probe made to test single flux quantum(SFQ) circuits was comprised of semi-rigid coaxial cables and microstrip lines. The impedance was set at 50 $\Omega$to carry high-speed signals without much loss. To do performance test of high-speed probe, we have attempted to fabricate a test chip which has a coplanar waveguide(CPW) structure. Electromagnetic simulation was done to optimize the dimension of CPW so that the CPW structure has an impedance of 50$\Omega$, matching in impedance with the probe. We also used the simulation to investigate the effect of the width of signal line and the gap between signal line and ground plane to the characteristics of CPW structure. We fabricated the CPW structure with a gold film deposited on Si wafer whose resistivity was above $1.5\times$10$_4$$\Omega$.cm. The magnitudes of S／sub 21／ of CPW at 6 ㎓ in simulations and in the actual measurements done with a network analyzer were: -0.1 ㏈ and -0.33 ㏈ (type A),-0.2 ㏈ and -0.48 ㏈ (type B), respectively. Using the test chip, we have successfully tested the performance of high-speed probe made for SFQ circuits. The probe showed the good performance overthe bandwidth of 10 ㎓.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.947-954
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• 1999

A new low phase noise Dielectric Resonator Parallel Feedback Oscillator(DRPFO) that is proposed in this paper has a simple structure so that it can be fabricated in low cost and with high performance. The proposed DRPFO is in a feedback loop oscillator configuration, which is composed of a low noise amplifier, a power amplifier, a power attenuator, a power divider and a parallel resonator feedback element that consists of a dielectric resonator coupled with two microstrip lines. The measured phase noise of DRPFO was less than -81 dBc/Hz at offset frequency 1 kHz of 10.75 GHz carrier frequency, and the frequency stability of DRPFO was less than $\pm$200 kHz over the temperature range of -40$^{\circ}$C to +60$^{\circ}$C.