• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2006년도 전기학술대회논문집
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• pp.263-264
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• 2006

On this study the performance of engineering workstation running OpenGL based application The following instructions are enhanced by configuring of the microprocessor and main memories. Single processors and more main memories are better than dual and less or same is confirmed.

• 제어로봇시스템학회논문지
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• 제5권7호
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• pp.855-861
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• 1999

In this paper, we present new application for the auction method which has been based on one-chip microprocessors. We develop the portable wired terminal for market blocker. And, using that, the recommended price of products is able to push into and show the information of action status. Through our research, using EAS(Electronic Auction System), we can prevent supplier from blocker's rigging the market, because anyone who have a qualification for the action blocker is able to participate in action.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.974-979
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• 1990

The system discussed in this paper is an integrated stand-alone system with the full functional capabilities required of a telerobot system. It is complete with a force-reflecting 6-DOF hand controller, driving a PUMA 560 or 762 robot, with an integrated force-torque sensing wrist sensor and servo-driven parallel jaw gripper. A mix of custom and standard electronics, distributed computers and microprocessors, with embedded and downloadable software, have been integrated into the system, giving rise to a powerful and flexible teleautonomous control system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.281-284
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• 2001

This paper describes an analog multi-phase delay-locked loop (DLL) to solve the harmonic lock problem using current-starved inverter and shunt-capacitor delay cell. The DLL can be used not only as an internal clock buffer of microprocessors and memory It's but also as a multi-phase clock generator for gigabit serial interfaces. The proposed circuit was simulated in a 0.25${\mu}{\textrm}{m}$ CMOS technology to solve harmonic lock problem and to realize fast lock-on time and low-jitter we verified time interval less than 40 ps as the simulation results.

• 대한전자공학회논문지
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• 제19권1호
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• pp.35-40
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• 1982

마이크로프로세서는 공학분야에서 점차 보편화 되고 있다. 본 논문에서는 제어계의 감쇠상수 ζ을 변화하는 제어기를 마이크로프로세서로 구현해 본 것이다. 결과는 응답시간면에서 긍정적으로 개선되었음을 볼 수 있었다.

• ETRI Journal
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• 제6권3호
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• pp.9-16
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• 1984

This paper describes $\mu$-law PCM/ADPCM Code Conversion System. The system algorithm is computer-simulated, and with the result of simulation the system is designed by using the Am 2900 family's Bit-Slice Microprocessors which have a high-speed processing power. The ADPCM algorithm is based on Jayant's model and the converting algorithm between $\mu$-law PCM and linear PCM is developed according to the CCITT Recommendation G. 711.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.204-204
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• 2000

This paper describes the development of training simulator for Hadong fossil Power Plant. The simulator was developed to train operator, test new control Logic and evaluate alternative operating procedure for expert engineer of control system. The most control logics such as Siemens TELEPERM ME and GE Mark V are translated directly from microprocessors. Those HMI are also directly emulated. The simulation was performed by ProTRAX modeling software. The paper discusses the configuration of simulator and the simulation results of 30%, 50%, 75% and 100% normal rate load test.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2004년도 봄 학술발표논문집 Vol.31 No.1 (A)
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• pp.931-933
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• 2004

In a SoC environment, asynchronous design techniques offer solutions for problems of synchronous design techniques. Asynchronous FIFOs have the advantages of easier interconnection methods and higher throughput than synchronous ones. Low latency and high throughput are two imp ortant standards in asynchronous FIFOs. We present low latency asynchronous FIFO in the paper, which optimizes GasP[6]. Pre-layout of HSPICE simulations of a 8-stage FIFO on 1-bit datapath using Anam's 0.25$\mu\textrm{m}$ technology indicates 17% lower latency than GasP.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 D
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• pp.2859-2861
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• 2000

In this paper, a robot system is proposed to make it easy to learn about microprocessors. The proposed system consists of several subsystems. Since each subsystem can be operated with other subsystems or without other subsystems, many microprocessor courses can be offered depending on the background of students. Also the proposed system can be used in some robotics courses which emphasize sensor and tele-operation because it contains camera, MPEG encoder, IR sensor, and RF communication module.

• 대한전기학회논문지
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• 제31권7호
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• pp.25-30
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• 1982

This paper considered the energy saving problem of D.C. motor in arbitrary load condition. We can improve efficiency by maintaining the proper ratio of armature current/field current. First, the condition of maximizing the efficiency was obtained, and then the real time control was implemented by using microprocessors. As a result, the efficiency was improved in spite of constant output. For example, the efficiency at 1/5 load was improved from 56.7% to 80%.