• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.913-916
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• 1990

In this paper, attempts have been made to control AC synchronous servo motor used as actuators of joints of the FARA robot with high dynamic performance and precise positioning. The AC synchronous servo motors used in FARA robots have resolves as position sensors. Resolver to digital converters are used in order to obtain the information of rotor speed and position from resolver outputs. The proposed joint position control system consists of four speed controller and one position controller. Analog methods are used in the position controller, while digital methods are used in the position controller. For precise position control, PID control algorithm and interpolation functions are executed in two 16 bit microprocessors with sampling rate 2ms. Experimental results show that the proposed joint position control system can be effectively applied to industrial robots in order to obtain high dynamic performance and precise positioning. The proposed joint position control system is being used in the control of FARA robots of Samsung Electronics.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.914-917
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• 1999

The paper describes a 17 $\times$ 17-b multiplier using the Radix-4 Booth’s algorithm. which is suitable for 32-bit RISC/DSP microprocessors. To minimize design area and achieve improved speed, a 2-stage pipeline structure is adopted to achieve high clock frequency. Each part of circuit is modeled and optimized at the transistor level, verification of functionality and timing is performed using HSPICE simulations. After modeling and validating the circuit at transistor level, we lay it out in a 0.35 ${\mu}{\textrm}{m}$ 1-poly 4-metal CMOS technology and perform LVS test to compare the layout with the schematic. The simulation results show that maximum frequency is 330MHz under worst operating conditions at 55$^{\circ}C$ , 3V, The post simulation after layout results shows 187MHz under worst case conditions. It contains 9, 115 transistors and the area of layout is 0.72mm by 0.97mm.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1987년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 16-17 Oct. 1987
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• pp.492-496
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• 1987

The testing philosophy and control schemes are investigated and applied to construct the Automatic Microwave Leakage Inspection System (AMLIS) . AMLIS is consists of three major parts such as Material Handling Mechanism, Fine Positioning Mechanism and Scanning Mechanism. The material Handling unit is designed to perform loading and unloading microwave oven onto the testing point by pneumatic cylinder and vacuum pump. The Fine positioning part includes X-Y-.THETA. table and distance sensing equipment. The scanning part is composed of five SCARA robots, which traverse X-Y-Z catesian coordinates respectively. The leakage testing probes are placed at the end of this each robot then the path and speed are both controlled via microprocessors. A performance test of this system combined with electric parts and software is done and the basic major function of system are accomplished.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.212-214
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• 2004

As the maximum power operating point(MPOP) of photovoltaic(PV) power generation systems changes with changing atmospheric conditions such as solar radiation and temperature, an important consideration in the design of efficient PV system is to track the MPOP correctly. Many maximum power point tracking(MPPT) techniques have been considered in the past, however, techniques using microprocessors with appropriate MPPT algorithms are favored because of their flexibility and compatibility with different PV arrays. Although the efficiency of these MPPT algorithms is usually high, it drops noticeably in case of rapidly changing atmospheric conditions. This paper analysed and researched the characteristics of three MPPT algorithms; P&O, Inc&Cond, ImP&O and simulated them with irradiance changing.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.925-928
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• 2003

As the maximum power operating point(MPOP) of photovoltaic(PV) power generation systems changes with changing atmospheric conditions such as solar radiation and temperature, an important consideration in the design of efficient PV system is to track the MPOP correctly. Many maximum power point tracking(MPPT) techniques have been considered in the past, however, techniques using microprocessors with appropriate MPPT algorithms are favored because of their flexibility and compatibility with different PV arrays. Although the efficiency of these MPPT algorithms is usually high, it drops noticeably in case of rapidly changing atmospheric conditions. This paper proposed a new MPPT algorithm based on perturb & observe(P&O) algorithm with experiment. The results shows that the new P&O algorithm has successfully tracked the MPOP, even in case of rapidly changing atmospheric conditions, and has higher efficiency than ordinary algorithms.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 추계학술대회 논문집
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• pp.234-237
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• 2003

As the maximum power operating point (MPOP) of photovoltaic (PV) power systems changes with changing atmospheric conditions, the efficiency of maximum power point tracking (MPPT) is important in PV power systems. Many MPPT techniques have been considered in the past, but techniques using microprocessors with appropriate MPPT algorithms are favored because of their flexibility and compatibility with different PV arrays. Although the efficiency of these MPPT algorithms is usually high, it drops noticeably in case of rapidly changing atmospheric conditions. In this paper, we proposed a new MPPT control method called improved perturb and observe method (ImP&O), anda simple voltage and current characteristic equation of a PV array for PV array simulator. Experimental results verify the accuracy and excellent performance of the proposed MPPT method. ImP&O algorithm is very simple, and has successful tracked the MPOP, even in case of rapidly changing atmospheric conditions.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.33-33
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• 2000

In this paper a new distributive control system for BA(Building Automation ) lighting control used on general microprocessors is presented. For optimal lighting control and saving energy, The system have to control the group and pattern lighting control as well as individual light control at one time. Tn this paper, This functions are accomplished with low-cost and simple microprocessor. A plurality of modulated light control terminals are connected to the central control unit through a pair of power line. This power line provide both power and signal to the each terminal and the data is transmitted through cyclic time division multiplex transmission. With this structure a low-cost distributive control system for lighting applications has been achieved, allowing energy and maintenance saving and reliability increase of the light control system.

• Progress in Superconductivity
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• 제9권2호
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• pp.157-161
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• 2008

Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.

• 한국통신학회논문지
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• 제21권2호
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• pp.409-416
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• 1996

This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

• 한국통신학회논문지
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• 제27권4C호
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• pp.388-397
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• 2002

본 논문에서는 고성능 내장형 프로세서에서 멀티미디어 성능을 효과적으로 향상시킬 수 있는 SIMD-DSP/FPU를 설계하였다. 하드웨어 증가를 최소화하기 위해 기존 연산기의 분할 구조를 제시하였고 면적이 작은 연산기를 제안하였다. 연산기의 공유를 통해 FPU의 하드웨어 면적을 크게 줄였다. 제안된 구조는 HDL로 모델링되고 0.35 $\mu\textrm{m}$ 표준 셀 공정으로 합성되어, 약 십만 등가 게이트의 면적을 갖는 것으로 보고되었으며 최악조건에서 코어 주파수인 50MHz 이상으로 동작하는 것이 예상된다.