• Title/Summary/Keyword: Microprocessor system

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Multi -Core Transactional Memory for High Contention Parallel Processing (집중 충돌 병렬 처리를 위한 효율적인 다중 코어 트랜잭셔널 메모리)

  • Kim, Seung-Hun;Kim, Sun-Woo;Ro, Won-Woo
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.48 no.1
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    • pp.72-79
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    • 2011
  • The importance of parallel programming seriously emerges ever since the modern microprocessor architecture has been shifted to the multi-core system. Transactional Memory has been proposed to address synchronization which is usually implemented by using locks. However, the lock based synchronization method reduces the parallelism and has the possibility of causing deadlock. In this paper, we propose an efficient method to utilize transactional memory for the situation which has high contention. The proposed idea is based on the theoretical analysis and it is verified with simulation results. The simulation environment has been implemented using HTM(Hardware Transactional Memory) systems. We also propose a model of the dining philosopher problem to discuss the efficient resource management using the transactional memory technique.

Development of O-Ring Measurement Systems of Muscular Meridians for objectification of Constitutional Diagnosis (체질 진단의 객관화를 위한 O-Ring 경근 계측시스템의 개발)

  • 정동명
    • Journal of Biomedical Engineering Research
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    • v.16 no.4
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    • pp.555-561
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    • 1995
  • In this paper, the O-Ring Measurement System (O-R MS) has been designed to supplement such subectivity and apply to the diagnosis by constitution. A single chip microprocessor of Intel MCS-51 family has been used to control the O-R MS and process data with real time, and the O-R MS could measure the minute muscular strength, expanded width between fingers, and time of the measurement. Therefore the objective constitutional diagnosis is possible by the O-R MS. As a clinical testing for estimating credibility of O-R MS, the acupuncture points representing the constitution has been stimulated using a semiconductor laser stimulator and measure the muscular strength by the O-R MS. The result of clinical testing has been shown that the constitutional diagnosis with the O-R MS is proved highly precision of 96% and it is expected that the O-R MS can be used practically for the objective constitutional diagnosis.

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A Study on the Design of a RISC core with DSP Support (DSP기능을 강화한 RISC 프로세서 core의 ASIC 설계 연구)

  • 김문경;정우경;이용석;이광엽
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11C
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    • pp.148-156
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    • 2001
  • This paper proposed embedded application-specific microprocessor(YS-RDSP) whose structure has an additional DSP processor on chip. The YS-RDSP can execute maximum four instructions in parallel. To make program size shorter, 16-bit and 32-bit instruction lengths are supported in YS-RDSP. The YS-RDSP provides programmability. controllability, DSP processing ability, and includes eight-kilobyte on-chip ROM and eight-kilobyte RAM. System controller on the chip gives three power-down modes for low-power operation, and SLEEP instruction changes operation statue of CPU core and peripherals. YS-RDSP processor was implemented with Verilog HDL on top-down methodology, and it was improved and verified by cycle-based simulator written in C-language. The verified model was synthesized with 0.7um, 3.3V CMOS standard cell library, and the layout size was 10.7mm78.4mm which was implemented by using automatic P&R software.

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The Wearable Sensor System to Monitor the Head & Neck Posture in Daily Life (웨어러블 센서를 이용한 일상생활중 머리-목 자세 측정 시스템)

  • Lee, Jaehyun;Chee, Youngjoon;Bae, Jieun;Kim, Haseon;Kim, Younghoon
    • Journal of Biomedical Engineering Research
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    • v.37 no.3
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    • pp.112-118
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    • 2016
  • The neck pain is fairly common occurance. Forward head posture and text neck are poor postures which may be related with neck pain but the evidence is not enough. We developed the wearable sensor which can assess the head & neck posture in daily life. Microprocessor, Bluetooth low energy, and 3-axis accelerometer, rechargeable battery and vibratior for reminding are used to implement the wearable sensor. Real-time algorithm to parameterize the posture for one epoch is implemented which classifies the posture in the epoch into three classed; dynamic, static_good posture, and static_poor posture. Also the algorithm makes reminding to its wearer to give them the prolonged poor posture is detected. The mean error of measurement was 1.2 degree. The correlation coefficient between neck angle and craniovertebral angle was 0.9 or higher in all cases. With the pilot study on text neck syndrome was also quatified. Average of neck angle were 74.3 degree during the listening in the classroom and 57.8 degree during the smartphoning. Using the wearable sensor suggested, the poor postures of forward head posture and neck neck can be detected in real-time which can remind the wearer according to his/her setting.

Consideration of Don't-care Condition for Multiplexer-based Logic Design (For Application to Arduino-based Design Education) (다중화기 기반 논리 설계를 위한 무정의 조건의 고찰 (아두이노 설계 교육에의 활용을 위한))

  • Lee, Jae Min
    • Journal of Digital Contents Society
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    • v.18 no.5
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    • pp.881-888
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    • 2017
  • Logic design using multiplexer has been used as a useful method for design convenience and flexibility in structural digital system design. In this paper, we analyze the effect of don't care conditions on logic optimization in a multiplexer-based logic design, which was not discussed enough in the previous studies in multiplexer based logic design, and describe the use of don't care conditions for designing of a single multiplexer and multiple multiplexer-based logic design. Especially, the design method when the number of data input is not 2m (as the number of selection lines is m) is considered. We also describe how to apply the proposed technique to the digital logic design education in conjunction with microprocessor design using Arduino which is widely used in creative engineering education recently.

Fabrication and Test of a $HgI_2$ Gamma Ray Detector (감마선 검출용 $HgI_2$ 소자 제작 및 특성 평가)

  • Choi, Myung-Jin;Lee, Hong-Kyu;Kang, Young-Il;Lim, Ho-Jin;Choi, Seung-Ki
    • Journal of Radiation Protection and Research
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    • v.16 no.2
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    • pp.1-6
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    • 1991
  • The $HgI_2$ single crystal which can be used for the ${\gamma}-ray$ detector at room temperature was grown by Temperature Oscillation Method. The low temperature photoluminescence, specific resistivity and trap concentration of $HgI_2$ single crystal were investigated. Three main luminescence bands were observed at 2.30eV, 2.20eV and 2.00eV at 20K, related to the excitons, I-vacancies and impurities, respectively. The specific resistivity and trap concentration of $HgI_2$ single crystal were $10^{11}{\Omega}\;cm\;and\;1.8{\times}10^{14}/cm^3$ at room temperature, respectively. Also the radiation detecting system was deviced by $HgI_2$ ${\gamma}-ray$ detector, one chip microprocessor, LCD module and personal computer. The prepared $HgI_2$ ${\gamma}-ray$ detector showed a good linearity of ${\gamma}-radiation$ dose for standard ${\gamma}-ray$.

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Development of a Lighting Control Switch Using Power Line Communication Technology (전력선 통신기술을 이용한 조명제어 스위치의 개발)

  • Song, Jae-Yong;Moon, Seung-Bo;Kil, Gyung-Suk;Lee, Gyung-Soo;Kim, Chang-Yul
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.281-284
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    • 2005
  • A lighting control switch, extended to incorporate a power line communication technology, is developed. The system uses not an exclusive microprocessor but a general one, and developed PPM protocol. The coupling circuit is a type of an isolation LC filter, and the impedance of the circuit was designed as low as possible to extend signal transmission distance. The frequency of the carrier, considering the data length and signal attenuation as the length of power lines, was set at 250 kHz. Tests on a prototype in an indoor power lines have shown that the switch has a stable operation with the distance of power lines

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The Development of Buck Type Electronic Ballast for 250W MHL and Dimming System (250W MHL용 Buck Type 전자식 안정기 및 Dimming 시스템 개발)

  • 박종연;박영길;정동열;김한수
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.1
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    • pp.30-40
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    • 2002
  • This paper studies the electronic ballast development for 250w MH lamps. We have improved the input power factor using a PFC IC. To provide the rating voltage required In the lamps, we have used the buck type dc-dc converter By this method, the stress of switching devices in inverter can be reduced. The inverter is the Full-Bridge type. To eliminate the acoustic resonance phenomena of MH lamps, we have added the high frequency sinewave voltage to the low frequency square-wave voltage to the lamp. We hove developed the igniter circuit using the L, C devices. We could control dimming of the lamp by varying the output voltage of the buck converter. The time of illuminating lamps and luminous intensity could be adjusted by season and time band. The buck converter output voltage can be controlled and the no load and over current situation were Protected by the development of the microprocessor Program.

Evaluation of Reliability Worth Considering Sustained Interruptions and Voltage Sags (영구정전과 순간전압강하를 고려한 신뢰도 비용 평가)

  • Lee, Hee-Tae;Moon, Jong-Fil;Seol, Kyu-Hwan;Yun, Sang-Yun;Kim, Jae-Chul
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.5
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    • pp.13-20
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    • 2008
  • Power quality problems such as momentary interruptions and voltage sags do not great influence on loads at past. However, the interests in power quality problems increase as the use of sensitive loads with microprocessor like computers increases recently. Accordingly, power system reliability research focusing to sustained interruption and momentary interruption partially needs more accurate evaluation methods including momentary and instantaneous problems. That is, many sensitive loads being tripped by voltage sags result in interruption costs. In this paper, new reliability worth evaluation method is presented considering voltage sags. We calculated the magnitude of voltage sags using fault studies and the duration of voltage sags using the trip time of protective relays for each fault. Moreover, we includes the customer interruption cost resulted from sensitive load trip by voltage sags. Through case studies, we evaluate the effects of voltage sags for permanent faults.

Early Start Branch Prediction to Resolve Prediction Delay (분기 명령어의 조기 예측을 통한 예측지연시간 문제 해결)

  • Kwak, Jong-Wook;Kim, Ju-Hwan
    • The KIPS Transactions:PartA
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    • v.16A no.5
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    • pp.347-356
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    • 2009
  • Precise branch prediction is a critical factor in the IPC Improvement of modern microprocessor architectures. In addition to the branch prediction accuracy, branch prediction delay have a profound impact on overall system performance as well. However, it tends to be overlooked when the architects design the branch predictor. To tolerate branch prediction delay, this paper proposes Early Start Prediction (ESP) technique. The proposed solution dynamically identifies the start instruction of basic block, called as Basic Block Start Address (BB_SA), and the solution uses BB_SA when predicting the branch direction, instead of branch instruction address itself. The performance of the proposed scheme can be further improved by combining short interval hiding technique between BB_SA and branch instruction. The simulation result shows that the proposed solution hides prediction latency, with providing same level of prediction accuracy compared to the conventional predictors. Furthermore, the combination with short interval hiding technique provides a substantial IPC improvement of up to 10.1%, and the IPC is actually same with ideal branch predictor, regardless of branch predictor configurations, such as clock frequency, delay model, and PHT size.