• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.387-390
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• 2002

This paper presents deposition and characterizations of microcrystalline silicon(${\mu}$c-Si:H) films prepared by hot wire chemical vapor deposition at substrate temperature below 300$^{\circ}C$. The SiH$_4$ concentration[F(SiH$_4$)/F(SiH$_4$).+(H$_2$)] is critical parameter for the formation of Si films with microcrystalline phase. At 6% of silane concentration, deposited intrinsic ${\mu}$c-Si:H films shows sufficiently low dark conductivity and high photo sensitivity for solar cell applications. P-type ${\mu}$c-S:H films deposited by Hot-Wire CVD also shows good electrical properties by varying the rate of B$_2$H$\_$6/ to SiH$_4$ gas. The solar cells with structure of Al/nip ${\mu}$c-Si:H/TCO/g1ass was fabricated with single chamber Hot-Wire CVD. About 3% solar efficiency was obtained and applicability of HWCVD for thin film solar cells was proven in this research.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.66-69
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• 2002

This paper presents deposition and characterizations of microcrystalline silicon$({\mu}c-Si:H)$ films prepared by hot wire chemical vapor deposition at substrate temperature below $300^{\circ}C$. The $SiH_{4}$ concentration$[F(SiH_{4})/F(SiH_{4})+F(H_{2})]$ is critical parameter for the formation of Si films with microcrystalline phase. At 6% of silane concentration, deposited intrinsic ${\mu}c-Si:H$ films shows sufficiently low dark conductivity and high photo sensitivity for solar cell applications. P-type ${\mu}c-Si:H$ films deposited by Hot-Wire CVD also shows good electrical properties by varying the rate of $B_{2}H_{6}$ to $SiH_{4}$ gas. The solar cells with structure of Al/nip ${\mu}c-Si:H$/TCO/glass was fabricated with single chamber Hot-Wire CVD. About 3% solar efficiency was obtained and applicability of HWCVD for thin film solar cells was proven in this research.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.52.2-52.2
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• 2009

Si 박막형 solar cell은 Si 결정형 solar cell대비 cost 및 대면적화 측면에서 장점을 가지고 있다. 그러나 amorphous Si의 경우 light soacking에 의한 열화 문제가 있고, microcrystalline Si의 경우 요구되는 효율 확보를 위하여 $1.5{\mu}m$ 이상 두께가 필요하며, 증착율이 $5{\AA}/sec$.이하인 단점이 있다. 본 연구에서는 high deposition rate로 microcrystalline Si를 증착하기 위하여 high frequency, high power PECVD를 이용하였으며, RF power, 증착온도, H2/SiH4 ratio의 3인자를 3수준으로 변화시킨 완전요인배치 실험을 실시하였다. 실험결과 증착율은 $8.0{\AA}/sec.{\sim}52.8{\AA}/sec$ 범위, crystalline fraction은 0%~83.3% 범위의 결과를 얻었으며, 결정이 형성된 조건에서는 XRD분석결과 $2\theta=28.5$ 및 47.5에서 Si (111), (220) peak을 확인할 수 있었다. Surface Profilometer 를 이용한 surface roughness의 경우 $6.3{\AA}\sim32.4{\AA}$ 범위의 결과를 얻었으며, crystalline Portion이 높을수록 surface roughness가 증가함을 알 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.267-267
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• 2010

The structural and electrical properties of microcrystalline silicon films were investigated by hot wire chemical vapor deposition(HWCVD) often called catalytic chemical vapor deposition(Cat-CVD). The Si microcrystalline phase is easily controlled by changing the rate of the silane concentration of $SiH_4$ to $H_2$ during deposition. The Structural property was observed by Raman and SEM. Photo-conductivity and dark conductivity, and photo-sensitivity were observed by Sunsimulator (AM 1.5 illumination). The film color was changed by the variation of silane concentration. HWCVD is useful for the formation of Si thin films for solar cell and needs further commercialized development for mass production.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.11a
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• pp.22-27
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• 1992

Phosphorus doped hydrogenated microcrystalline silicon (${\mu}c$-Si:H) thin films were deposited by PECVD (Plasma Enhanced Chemical Vapour Deposition) method using 10.2% $SiH_4$ gas (diluted in Ar) and 308ppm $PH_3$ gas (diluted in Ar). The structural, optical and electrical properties of the films were investigated as a function of substrate temperature(15 to $400^{\circ}C$) and RF power(10 to 120W). The thin film deposited by varing substrate temperature had columnar structure and microcrystalline phase. The volume fraction of microcrystalline phase in the films deposited at RF power of 80W, increased with increasing substrate temperature up to $200^{\circ}C$, and then decreased with further increasing substrate temperature. Volume fraction of microcrystalline phase increased monotonously with increasing RF power at substrate temperature of $250^{\circ}C$. With increasing volume fraction of microcrystalline, electrical resistivity of films decreased to 0.274 ${\Omega}cm$.

• Transactions on Electrical and Electronic Materials
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• v.12 no.5
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• pp.197-199
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• 2011

In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.64.2-64.2
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• 2011

Recently, Silicon Germanium (SiGe) alloys have been received considerable attention for their great potentials in advanced electronic and optoelectronic devices. Especially, microcrystalline SiGe is a good channel material for thin film transistor due to its advantages such as narrow and variable band gap and process compatibility with Si based integrated circuits. In this work, microcrystalline silicon-germanium films (${\mu}c$-SiGe) were deposited by DC/RF magnetron co-sputtering method using Si and Ge target on Corning glass substrates. The film composition was controlled by changing DC and RF powers applied to each target. The substrate temperatures were changed from $100^{\circ}C$ to $450^{\circ}C$. The microstructure of the thin films was analyzed by x-ray diffraction (XRD) and Raman spectroscopy. The analysis results showed that the crystallinity of the films enhances with increasing Ge mole fraction. Also, crystallization temperature was reduced to $300^{\circ}C$ with $H_2$ dilution. Hall measurements indicated that the electrical properties were improved by Ge alloying.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1344-1347
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• 2007

We have fabricated bottom gate TFTs with active layers of amorphous/microcrystalline Si double layers (DL). Dynamic electric stresses were applied to DL TFTs and a-Si TFTs to compare their degradation characteristics. The DL TFTs were more stable under dynamic stresses than a-Si TFTs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.57-58
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• 2008

Microcrystalline (${\mu}c$) silicon thin films were prepared on glass by plasma-enhanced-chemical-vapor-deposition (PECVD) at various substrate temperature, and dilution ratio of $H_2$ with $SiH_4$. The structural and optical properties of. the ${\mu}c-Si$ thin films were investigated using XRD and UV-VIS spectrophotometer. The ${\mu}c-Si$ thin film with 42 nm grain size was grown at optimal condition of 2.5 Torr, spacing between electrodes of 3cm, deposition time of 3000s, RF power of 200W, substrate temperature of $350^{\circ}C$, $SiH_4$ ($20%SiH_4$+80%He) of 50sccm, and $H_2$ of 100sccm.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.218-221
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• 2008

Bottom-gate microcrystalline silicon thin film transistors (${\mu}c$-Si:H TFTs) were fabricated on glass and transparent polyimide substrates by conventional 13.56 MHz RF plasma enhanced chemical vapor deposition at $200^{\circ}C$. The deposition rate of the ${\mu}c$-Si:H film is 24 nm/min and the amorphous incubation layer near the ${\mu}c$-Si:H/silicon nitride interface is unobvious. The threshold voltage of ${\mu}c$-Si:H TFTs can be improved by $H_2$ or $NH_3$ plasma pretreatment silicon nitride film.