• Title/Summary/Keyword: Micro-tec

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Analysis of the Solar cell IV characteristic curve Process using MicroTec Tool (MicroTec을 이용한 태양전지의 IV특성곡선 분석)

  • Han, Jihyung;Jung, Hakkee;Jeong, Dongsoo;Lee, Jongin;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.667-670
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    • 2009
  • 본 연구에서는 MicroTec을 이용하여 태양전지의 IV특성곡선을 분석하였다. 태양전지의 IV특성곡선은 태양전지의 효율을 나타낸다. 효율을 높이기 위하여 전극이 직접 접촉하는 부분에 고농도의 형태를 취하고 나머지 전극이 없는 부분에 저농도 도핑으로 전면을 처리한다. 이때 고농도 층을 과대하게 불순물을 주입할 경우 전극부분의 재결합률이 상승하여 에너지 변환 손실로 이어진다. 본 연구에서는 태양전지의 최대효율을 얻을 수 있는 도핑의 농도를 결정하여 이의 IV특성곡선을 비교 분석 하고자한다.

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Trench D-MOS using MicroTec oxide according to the size of the current - voltage characteristics (MicroTec을 이용한 Trench D-MOS의 산화막크기에 따른 전류-전압 특성)

  • Lim, Se-Hoon;Han, Ji-Hyeong;Jung, Hak-Kee;Lee, Jong-In;Cheong, Dong-Soo;Kwon, Oh-Sin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.779-781
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    • 2010
  • Trench D-MOS(double-diffusion MOS)는 기존의 D-MOS를 대체한 것으로 전체 전류의 길이를 짧게 함으로써 온전압강하가 낮아지게 된다. 따라서 소자가 턴-온시에 전력소모가 작게 되며, 온저항과 트레이드 오프관계인 턴-오프 특성도 그다지 나빠지지 않아 트레이드 오프 특성도 개선되어지는 장점이 있다. 본 논문은 MicoroTec 시뮬레이션을 이용하여 Trench D-MOS의 산화벽을 다르게하여 전류-전압 특성을 연구하였다.

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Design of the MOSFET Process using MicroTec Tool (MicroTec을 이용한 MOSFET Process 설계)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jae-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.740-743
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    • 2008
  • 본 연구에서는 MicroTec을 이용하여 MOSFET Process 설계를 구현하였다. MOS(Metal Oxide Semiconductor)는 실리콘 기판 등의 반도체 표면에 산화막을 입히고 그 위에 금속을 부착시킨 구조이다. MOSFET의 응용은 VLSI 회로에만 제한되지 않고 전력-전자 회로에서 중요한 역할을 하며 점점 더 적용범위를 증가시켜 마이크로파 응용에 이르기까지 광범위하게 사용하고 있다. Process를 구연하는 방법은 Grid의 크기를 지정하고, 기판의 원소는 B로 지정하고 $1{\times}10^{15}/cm^3$ 만큼 도핑한다. 기판에 구멍을 내어 B와 As의 도핑농도와 에너지값을 설정한다. 마지막으로 어넬링 파라미터 값을 설정한다. 본 연구에서는 원소의 도핑값과 에너지값의 변화에 따른 MOSFET Process의 변화를 알 수 있었다.

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Analysis of Breakdown voltage for Trench D-MOSFET using MicroTec (MicroTec을 이용한 Trench D-MOSFET의 항복전압 분석)

  • Jung, Hak-Kee;Han, Ji-Hyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.6
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    • pp.1460-1464
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    • 2010
  • In the paper, the breakdown voltage of Trench D-MOSFET have been analyzed by using MircoTec. The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high-integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. A Trench MOSFET is the most preferred power device for high voltage power applications. The oxide thickness and doping concentration in Trench MOSFET determines breakdown voltage and extensively influences on high voltage. We have investigated the breakdown voltage characteristics according to variation of doping concentration from $10^{15}cm^{-3}$ to $10^{17}cm^{-3}$ in this study. We have also investigated the breakdown voltage characteristics according to variation of oxide thickness and junction depth.

Analysis of Impact ionization Model for Nano structure Silicon device (나노구조 실리콘 소자의 임팩트이온화 모델 분석)

  • 고석웅;임규성;정학기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.10a
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    • pp.656-659
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    • 2001
  • Recently, as device techniques are advancing and its size become smaller, the hot carriers transport analysis has more important. Impact ionization(I.I.) effect is electron-hole pair generation process by the dispersion of hot carrier in the contrast with Auger process. Complete I.I. model is essential to simulate and analysis the device transport characteristics. In the study, we will try to analysis I.I. models using Monte Carlo simulator, TCAD and Micro-Tec and present more accurate I.I. model.

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Design of DGMOSFET for Optimum Subthreshold Characteristics using MicroTec

  • Jung, Hak-Kee;Han, Ji-Hyeong
    • Journal of information and communication convergence engineering
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    • v.8 no.4
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    • pp.449-452
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    • 2010
  • We have analyzed channel doping and dimensions(channel length, width and thickness) for the optimum subthreshold characteristics of DG(Double Gate) MOSFET based on the model of MicroTec 4.0. Since the DGMOSFET is the candidate device to shrink short channel effects, the determination of design rule for DGMOSFET is very important to develop sub-100nm devices for high speed and low power consumption. As device size scaled down, the controllability of dimensions and oxide thickness is very low. We have analyzed the short channel effects for the variation of channel dimensions, and found the design conditions of DGMOSFET having the optimum subthreshold characteristics for digital applications.

Analysis of sub-20nm MOSFET Transconductance characteristic by Channel Lenght (채널 길이에 따른 20nm 이하 MOSFET의 전달컨덕턴스 특성 분석)

  • Han, Jihyung;Jung, Hakkee;Lee, Jaehyung;Jeong, Dongsoo;Lee, Jongin;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.935-937
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    • 2009
  • 본 논문에서는 MicroTec을 이용한 채널 길이에 따른 20nm이하 MOSFET의 전달컨덕턴스의 특성을 분석하였다. 전달컨덕턴스는 게이트 전압의 변화에 의한 드레인 전류의 변화이다. MicroTec의 이동도 모델중 Lombardi, Constant, Yamaguchi 모델을 선택하여 이동도 모델에 따른 gm(전달컨덕턴스)를 비교하였다. 인가전압은 소스 0V, 기판 0V, 드레인 0.1V, 게이트는 -2.5V에서 4.5V까지 증가시켰다. 채널의 길이가 줄어들수록 gm(전달컨덕턴스)의 최대값과 드레인 전류가 증가함을 알 수 있었다.

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Analysis of subthreshold region transport characteristics according to channel thickness for DGMOSFET (DGMOSFET의 채널두께에 따른 문턱전압이하영역에서의 전송특성분석)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jong-In;Jeong, Dong-Soo;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.737-739
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    • 2010
  • In this paper, the subthreshold characteristics have been alanyzed using MicroTec4.0 for double gate MOSFET(DGMOSFET). The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high-integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. The oxide thickness and channel thickness in DG MOSFET determines threshold voltage and extensively influences on Ss(Subthreshold swing). We have investigated the threshold voltage and Ss(Subthreshold swing) characteristics according to variation of channel thickness from 1nm to 3nm in this study.

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Fabrication and Aging effect of Micro OADM using Automatic Alignment System (자동 광축 정렬시스템을 이용한 초소형 광통신용 마이크로 OADM 제작 및 Aging effect)

  • S. K., Kim;Y. H., Seo;D. S., Choi;T. J., Jae;K. H., Whang
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.10a
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    • pp.644-647
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    • 2004
  • Optical add/drop multiplexers (OADMs), one of the new network elements, will play a key role enabling greater connectivity and flexibility in the dense wavelength-division multiplexing (DWDM) networks. The importance of OADMs is that they allow the optical network to be local transmitting/extraction on a wavelength-by-wavelength basis to optimize traffic, efficient network utilization, network growth, and to enhance network flexibility. Also, the automatic assembly system of micro optical filters and fibers is a key technology in the development of optical modules with high functionality. Recently, one of remarkable tends in the development of optical communication industry is the miniaturization and integration of products. In this research, we have developed a system capable of automatic alignment of a film filter and a lensed fiber in order to improve the speed and losses in the optical fiber to filter alignment of optical modules. Using the developed automatic alignment system and silicon optical benches, we have fabricated the micro OADM and measured the insertion loss and aging effect.

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