• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.249-250
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• 2006

In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.644-647
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• 2003

Resulting from reproducibility and possibility of mass production. many researches to fabricate micro lens array using lithography have been developed. However, it still remains the level of fabricating compensation lens. Therefore, to realize the fabrication of lens having high numerical aperture can be the key technology of ultra slim optical system. Reflow phenomenon have been researched to make lens having high refractive power. And through those researches, the possibility to fabrication of high refractive power lens has been investigated. In this paper, we analyze the effect of many parameters in reflow process to get an aspheric shape with high repeatability. And we make possible to estimate shape error, through we give direct information about decrease in volume of photoresist.

• Journal of Power System Engineering
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• v.14 no.2
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• pp.12-15
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• 2010

It is requested to shorten the starting duration for idle stop function equipped cars without harmful effects on the environment. Higher cranking speeds can be achieved with high torque starter. The object of this study is to develope the high torque starter and evaluate its effect on the exhaust emissions. The test was conducted on a 1.5 L, 4-cylinder, 16 valve, multipoint-port-fuel-injection gasoline engine. Engine out emissions such as HC, CO, $CO_2$, and the excess air ratios, lambda were measured using MEXA-554JK. The result showed that a high torque starter, HTS-II shortened the starting duration and reduced engine out emissions of HC, CO and improved starting performance with larger excess air ratio than that of the original starter, Org. S and a high torque starter, HTS-I.

• Proceedings of the KSR Conference
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• 2010.06a
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• pp.227-233
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• 2010

This paper treats the method to build up Motor drive-circuit using semi-conduct control part like power transistor, MOSEFT and refers to the operation theory, forward, reverse rotation control and speed control method which is changed by PWM. And also, this paper mention to the basic principle of DC Motor and various Motor control method using micro-processor.

• Journal of the Korean Society for Precision Engineering
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• v.19 no.7
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• pp.59-64
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• 2002

Laser lithography technique is useful for fabricating micro-patterns of silicon wafers. In this work, the laser lithography micromachining technique is optimized based on Taguchi method. Sensitivity analysis was performed using laser scanning speed, laser power level, developing time and mixture ratio between developer and Di-water as the parameters. The results show that for the photoresist used in this work, 70${\mu}m$/s scan speed, 50㎽ laser power, 60sec. developing time and 6: 1 mixture ratio gives the best result. This work shows the effectiveness of laser lithography technique in fabricating patterns with a flew micrometer in width.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.165-167
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• 2006

In this paper we present a new-generation sensor network processor which is not optimized in circuit level, but in system architecture level. The new design build on a conventional processor architecture, improving the design by focusing on application oriented specification, ISA, and micro-architectural optimization that reduce overall design size and advance energy-per-instruction. The design employs harvard architecture, 8-bit data paths, and an compact 19 bit wide RISC ISA. The design also features a unique interrupt handler which offloads periodical monitoring jobs from the main part of CPU. Our most efficient design is capable of running at 300 KHz (0.3 MIPS) while consuming only about few pJ/instruction.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.585-588
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• 2002

In this paper, the current controlled active poler filter(APF) with the performance of reducing harmonic and improving power factor is studied. It has high speed and good performance with low cost. The current controlled shunt APF is proposed, and the control part of APF is designed of SOC(System On Chip). So this system has low expense and good performance. In this study, the micro-controller which designed with VHDL. is applied to APF system. And the proposed technique in this paper demonstrates the excellent of the dedicated micro-controller. VHDL-based ASIC can simplify the process of development and has a competition in market because it reduces the consuming time for the design of IC(Integrated Circuit) in system level.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2249-2254
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• 2008

A non-thermal micron size plasma needle is applicable for medical treatment because it includes radicals, charged particles, ultraviolet emission, and strong electric fields. The electric fields around the plasma needle device driven by a radio frequency wave are investigated in order to calculate the power delivered to the cell. A commercial multi-physics code, CFD-ACE, was utilized for the calculation of electric fields for the optimization of the needle structure. The electric field and energy absorption profiles are presented with the variation of the device structure and the distance between the needle and tissues. The living tissues effectively absorb the radio frequency power from the plasma needle device with the covered pyrex structure.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.3
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• pp.1-11
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• 1997

Since the radio spectrum is limited, future wireless system will have micro cellular architecture in order to provide multimedia traffic services on personal communicatons network. The small coverage area of micro cellular systems results in frequent hadnoffs and location updates. We focuse on network load and terminal power due to frequent location updates and propose a location tracking scheme using embedded-pager PCS terminals. The proposed scheme is expected to minimize theconsumption of PCS terminal powr and improve the receiving rate of callee because of the power saving mechanism and the embedded-pager PCS terminal. This paper proposes signaling flows among the network elements for the proposed location tracking scheme. The signaling flows are accomodated to not only the existed network architectures but alsothe ATM backbone network arcitecture. To verify the signaling flows, we used petri-Net model. The resutls show that the signaling flows are suitable to our proposed location tracking scheme.