• 제목/요약/키워드: Metal-insulator-semiconductor

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절연막이 후 열처리가 Metal/Ferroelectric/Insulator/Semiconductor 구조의 전기적 특성에 미치는 영향 (Effects of the Post-annealing of Insulator on the Electrical Properties of Metal/Ferroelectric/Insulator/Semiconductor Structure)

  • 원동진;왕채현;최두진
    • 한국세라믹학회지
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    • 제37권11호
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    • pp.1051-1057
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    • 2000
  • TiO$_2$와 CeO$_2$박막을 Si 위에 증착한 후 MOCVD법에 의해 PbTiO$_3$박막을 증착하여 MFIS 구조를 형성하였다. 절연층의 후열처리가 절연층 및 MFIS 구조의 전기적 특성에 미치는 영향을 관찰하기 위해 산소분위기와 $600^{\circ}C$~90$0^{\circ}C$의 온도범위에서 후 열처리를 행하였고, C-V 특성 및 누설전류 특성을 분석하였다. CeO$_2$와 TiO$_2$박막의 유전상수는 증착 직후 6.9와 15였으며, 90$0^{\circ}C$ 열처리를 행한 후 약 4.9와 8.8로 감소하였다. 누설전류밀도 역시 증착 직후 각각 7$\times$$10^{-5}$ A/$ extrm{cm}^2$와 2.5$\times$$10^{-5}$ A/$\textrm{cm}^2$에서 90$0^{\circ}C$ 열처리를 거친 후에 약 4$\times$$10^{-8}$ A/$\textrm{cm}^2$와 4$\times$$10^{-9}$ A/$\textrm{cm}^2$로 감소하였다. Ellipsometry 시뮬레이션을 통해 계산된 계면층의 두께는 90$0^{\circ}C$에서 약 115$\AA$(CeO$_2$) 및 140$\AA$(TiO$_2$)까지 증가하였다. 계면층은 MFIS 구조에서 강유전층에 인가되는 전계를 감소시켜 항전계를 증가시켰고, charge injection을 방지하여 Al/PbTiO$_3$/CeO$_2$(90$0^{\circ}C$, $O_2$)/Si 구조의 경우 $\pm$2 V~$\pm$10 V의 측정범위에서 memory window가 계속 증가하는 것을 보여주었다.

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MIT characteristic of VO2 thin film deposited by ALD using vanadium oxytriisopropoxide precursor and H2O reactant

  • Shin, Changhee;Lee, Namgue;Choi, Hyeongsu;Park, Hyunwoo;Jung, Chanwon;Song, Seokhwi;Yuk, Hyunwoo;Kim, Youngjoon;Kim, Jong-Woo;Kim, Keunsik;Choi, Youngtae;Seo, Hyungtak;Jeon, Hyeongtag
    • Journal of Ceramic Processing Research
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    • 제20권5호
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    • pp.484-489
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    • 2019
  • VO2 is an attractive candidate as a transition metal oxide switching material as a selection device for reduction of sneak-path current. We demonstrate deposition of nanoscale VO2 thin films via thermal atomic layer deposition (ALD) with H2O reactant. Using this method, we demonstrate VO2 thin films with high-quality characteristics, including crystallinity, reproducibility using X-ray diffraction, and X-ray photoelectron spectroscopy measurement. We also present a method that can increase uniformity and thin film quality by splitting the pulse cycle into two using scanning electron microscope measurement. We demonstrate an ON / OFF ratio of about 40, which is caused by metal insulator transition (MIT) of VO2 thin film. ALD-deposited VO2 films with high film uniformity can be applied to next-generation nonvolatile memory devices with high density due to their metal-insulator transition characteristic with high current density, fast switching speed, and high ON / OFF ratio.

Properties of Dy-doped $La_2O_3$ buffer layer for Fe-FETs with Metal/Ferroelectric/Insulator/Si structure

  • Im, Jong-Hyun;Kim, Kwi-Jung;Jeong, Shin-Woo;Jung, Jong-Ill;Han, Hui-Seong;Jeon, Ho-Seung;Park, Byung-Eun
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.140-140
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    • 2009
  • The Metal-ferroelectric-semiconductor (MFS) structure has superior advantages such as high density integration and non-destructive read-out operation. However, to obtain the desired electrical characteristics of an MFS structure is difficult because of interfacial reactions between ferroelectric thin film and Si substrate. As an alternative solution, the MFS structure with buffer insulating layer, i.e. metal-ferroelectric-insulator-semiconductor (MFIS), has been proposed to improve the interfacial properties. Insulators investigated as a buffer insulator in a MFIS structure, include $Ta_2O_5$, $HfO_2$, and $ZrO_2$ which are mainly high-k dielectrics. In this study, we prepared the Dy-doped $La_2O_3$ solution buffer layer as an insulator. To form a Dy-doped $La_2O_3$ buffer layer, the solution was spin-coated on p-type Si(100) wafer. The coated Dy-doped $La_2O_3$ films were annealed at various temperatures by rapid thermal annealing (RTA). To evaluate electrical properties, Au electrodes were thermally evaporated onto the surface of the samples. Finally, we observed the surface morphology and crystallization quality of the Dy-doped $La_2O_3$ on Si using atomic force microscopy (AFM) and x-ray diffractometer (XRD), respectively. To evaluate electrical properties, the capacitance-voltage (C-V) and current density-voltage (J-V) characteristics of Au/Dy-doped La2O3/Si structure were measured.

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비휘발성 메모리 응용을 위한 ALD법을 이용한 HfO2 절연막의 특성 (Properties of HfO2 Insulating Film Using the ALD Method for Nonvolatile Memory Application)

  • 정순원;구경완
    • 전기학회논문지
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    • 제59권8호
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    • pp.1401-1405
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    • 2010
  • We have successfully demonstrated of metal-insulator-semiconductor (MIS) capacitors with $HfO_2$/p-Si structures. The $HfO_2$ film was grown at $200^{\circ}C$ on H-terminated Si wafer by atomic layer deposition (ALD) system. TEMAHf and $H_2O$ were used as the hafnium and oxygen sources. A cycle of the deposition process consisted of 0.1 s of TEMAHf pulse, 10 s of $N_2$ purge, 0.1 s of $H_2O$ pulse, and 60 s of $N_2$ purge. The 5 nm thick $HfO_2$ layer prepared on Si substrate by ALD exhibited excellent electrical properties, including low leakage currents, no mobile charges, and a good interface with Si.

$LiNbO_3/Si_3N_4$ 구조를 이용한 MFIS 구조의 형성 및 특성 (Formations and properties of MFIS structure using $LiNbO_3/Si_3N_4$ structure)

  • 김용성;정상현;정순원;이남열;김진규;김광호;유병곤;이원재;유인규
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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    • pp.221-224
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    • 2000
  • We have successfully demonstrated metal-ferroel-ectric-insulator-semiconductor (MFIS) devices using Al/LiNbO$_{3}$/SiN/Si structure. The SiN thin films were made into metal -insulator- semiconductor (MIS) devices by thermal evaporation of aluminum source in a dot away on the surface. The interface property of MFIS from 1MHz & quasistatic C-V is good and the memory window width is about 1.5V at 0.2V/s signal voltage sweep rate. The gate leakage current density of MFIS capacitors using a aluminum electrode showed the least value of 1x10$^{-8}$ A/$\textrm{cm}^2$ order at the electric field of 300㎸/cm. And the XRD patterns shows the probability of applications of LN for MFIS devices for FeRAMs on amorphous SiN buffer layer.

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A Novel Body-tied Silicon-On-Insulator(SOI) n-channel Metal-Oxide-Semiconductor Field-Effect Transistor with Grounded Body Electrode

  • Kang, Won-Gu;Lyu, Jong-Son;Yoo, Hyung-Joun
    • ETRI Journal
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    • 제17권4호
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    • pp.1-12
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    • 1996
  • A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

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비휘발성 메모리 응용을 위한 ALD법을 이용한 $Al_2O_3$ 절연막의 특성 (Properties of $Al_2O_3$ Insulating Film Using the ALD Method for Nonvolatile Memory Application)

  • 정순원;이기식;구경완
    • 전기학회논문지
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    • 제58권12호
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    • pp.2420-2424
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    • 2009
  • We have successfully demonstrated of metal-insulator-semiconductor (MIS) capacitors with $Al_2O_3/p-Si$ structures. The $Al_2O_3$ film was grown at $200^{\circ}C$ on H-terminated Si wafer by atomic layer deposition (ALD) system. Trimethylaluminum [$Al(CH_3)_3$, TMA] and $H_2O$ were used as the aluminum and oxygen sources. A cycle of the deposition process consisted of 0.1 s of TMA pulse, 10 s of $N_2$ purge, 0.1 s of $H_2O$ pulse, and 60 s of $N_2$ purge. The 5 nm thick $Al_2O_3$ layer prepared on Si substrate by ALD exhibited excellent electrical properties, including low leakage currents, no mobile charges, and a good interface with Si.

유기박막트랜지스터 응용을 위해 플라즈마 중합된 Styrene 게이트 절연박막 (Plasma Polymerized Styrene for Gate Insulator Application to Pentacene-capacitor)

  • 황명환;손영도;우인성;바산바트호약;임재성;신백균
    • 한국진공학회지
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    • 제20권5호
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    • pp.327-332
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    • 2011
  • ITO가 코팅된 유리 기판 위에 플라즈마 중합법으로 styrene 고분자 박막을 제작하고 상부 전극을 진공 열증착법으로 제작된 Au 박막으로 한 MIM (metal-insulator-metal) 소자를 제작하였다. 또한, 플라즈마 중합된 styrene 고분자 박막을 유기 절연박막으로 하고 진공열증착법으로 pentacene 유기반도체 박막을 제작하여 유기 MIS (metal-insulator-semiconductor) 소자를 제작하였다. 플라즈마 중합법으로 제작된 styrene (ppS; plasma polymerized styrene) 고분자 박막은 styrene 단량체(모노머) 고유의 특성을 유지하면서 고분자 박막을 형성함을 확인하였으며, 통상적인 중합법으로 제작된 고분자 박막 대비 k=3.7의 높은 유전상수 값을 보였다. MIM 및 MIS 소자의 I-V 및 C-V 측정을 통하여 ppS 고분자 박막은 전계강도 $1MVcm^{-1}$에서 전류밀도 $1{\times}10^{-8}Acm^{-2}$ 수준의 낮은 누설전류를 보이고 히스테리시스가 거의 없는 우수한 절연체 박막임이 판명되었다. 결과적으로 유기박막 트랜지스터 및 유기 메모리 등 플렉서블 유기전자소자용 절연체 박막으로의 응용이 기대된다.

플라즈몬 효과에 의한 실리콘 기판위에 증착된 반도체 박막의 자기저항특성 (Magnetonic Resistance Properties of Semiconductor Thin Films by Plasmon Effect on Fabricated Si(100) Substrate)

  • 오데레사
    • 반도체디스플레이기술학회지
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    • 제18권3호
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    • pp.105-109
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    • 2019
  • Plasmons have conductive properties using the effect of amplifying magnetic and electric fields around metal particles. The collective movement of free electrons in metal particles induces and produces the generation of plasmon. Because the plasmon is concentrated on the surface of the nanoparticles, it is also called the surface plasmon. The polarizing effect of plasma on the surface is similar to the principle of surface currents occurring in insulators. In this study, it was found the conditions under which plasma is produced in SiOC insulators and studied the electrical properties of SiOC insulators that are improved in conductivity by plasmons. Due to the heat treatment temperature of thin film, plasma formation was shown differently, metal particles were used with normal aluminium, SiOC thin films were treated with heat at 60 degrees, conductivity was improved dramatically, and heat treatment at higher temperatures was found to be less conductivity.