• 제목/요약/키워드: Metal silicon

검색결과 873건 처리시간 0.021초

테르밋 반응을 이용하여 금속실리콘을 추출할 때 규석 순도에 따라 금속실리콘 순도 변화에 대한 고찰 (A Study on the Purity Change of Silicon Metal According to the Purity of Silica Stone in Metal Silicon Extraction by Thermit Reaction)

  • 김재희;한진호;신현명
    • 자원리싸이클링
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    • 제26권4호
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    • pp.19-25
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    • 2017
  • 금속실리콘을 제조하는 방법에는 탄소환원법, 플라즈마환원법, 테르밋반응 등이 있다. 상업용 금속실리콘을 대량 생산하는 방법으로 탄소환원법에 의한 아크전기로가 일반적으로 많이 사용되고 있다. 아크전기로를 이용한 생산시스템이 극복해야 할 문제로는 제조원가 중 전력비 비율이 30%를 차지할 정도로 높은 전기에너지 비용과 환경방지 시설구축 및 유지관리비용이다. 이러한 이유로 국내에서는 아직 아크전기로를 이용한 생산시스템이 상용화 제조시스템으로 구축되지 못하고 있다. 기업 및 연구기관에서 탄소환원법의 아크전기로를 이용하여 최적 생산시스템을 연구하고 있다. 세 가지 유형의 이산화규소를 테르밋반응을 통하여 순도변화를 알 수 있었다. 그리고 실험분석에서 테르밋반응을 사용하여 이산화규소 순도로 금속실리콘 순도 변화를 분석하였다. 이산화규소 순도와 금속실리콘 순도는 밀접한 관계가 있음을 알 수 있었다.

Fabrication and Characterization of Free-Standing Silicon Nanowires Based on Ultrasono-Method

  • Lee, Sung-Gi;Sihn, Donghee;Um, Sungyong;Cho, Bomin;Kim, Sungryong;Sohn, Honglae
    • 통합자연과학논문집
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    • 제6권3호
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    • pp.170-175
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    • 2013
  • Silicon nanowires were detached and obtained from silicon nanowire arrays on silicon substrate using a ultrasono-method. Silicon nanowire arrays on silicon substrate were prepared with an electroless metal assisted etching of p-type silicon. The etching solution was an aqueous HF solution containing silver nitrate. SEM observation shows that well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. After sonication of silicon nanowire array, an individual silicon nanowire was confirmed by FESEM. Optical characteristics of SiNWs were measured by FT-IR spectroscopy. The surface of SiNWs are terminated with hydrogen.

Poly-jog을 사용한 그리디 스위치박스 배선기 (A Greedy Poly-jog Switch-Box Router(AGREE))

  • 이철동;정정화
    • 대한전자공학회논문지
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    • 제26권4호
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    • pp.88-97
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    • 1989
  • 본 논문에서 제안하는 switch-box 배선기는 greedy poly-jog 배선기와 via 최소화기로 나누어진다. Greedy poly-jog 배선기는 Luk의 greedy swich-box 배선 알고리듬을 기본으로 하며, 수평track에 metal을 수직track에 poly-silicon을 배선하는 제한을 완화하여 필요한 경우에는 수평 track에 poly-silicon을 배선함으로써 배선영역의 수평track을 증가시키지 않고 배선할 수 있다. Via 최소화기는 배선된 wire의 각 corner를 펴거나 wire 선분을 평행이동하거나 metal을 poly-silicon 및 poly-silicon을 metal로 바꿈으로써 via와 배선길이를 줄이는 과정을 수행한다. 본 배선기는 column 방향으로 배선영역을 scan함으로써 배선을 완료하며, 시간복잡도는 O(M(N+ Nnet)) 이다. 여기서, M, N, Nnet은 각각 배선 column의 수, 배선 row의 수, net의 수이다.

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Growth of Silicon Nanowire Arrays Based on Metal-Assisted Etching

  • Sihn, Donghee;Sohn, Honglae
    • 통합자연과학논문집
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    • 제5권4호
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    • pp.211-215
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    • 2012
  • Single-crystalline silicon nanowire arrays (SiNWAs) using electroless metal-assisted etchings of p-type silicon were successfully fabricated. Ag nanoparticle deposition on silicon wafers in HF solution acted as a localized micro-electrochemical redox reaction process in which both anodic and cathodic process took place simultaneously at the silicon surface to give SiNWAs. The growth effect of SiNWs was investigated by changing of etching times. The morphologies of SiNWAs were obtained by SEM observation. Well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. Optical characteristics of SiNWs were measured by FT-IR spectroscopy and indicated that the surface of SiNWs are terminated with hydrogen. The thicknesses and lengths of SiNWs are typically 150-250 nm and 2 to 5 microns, respectively.

고효율, 저가화 실리콘태양전지를 위한 Ni/Cu/Ag 금속전극의 특성 연구 (Investigation of the Ni/Cu metallization for high-efficiency, low cost crystlline silicon solar cells)

  • 이지훈;조경연;이수홍
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2009년도 춘계학술발표대회 논문집
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    • pp.235-240
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    • 2009
  • Crystlline silicon solar cells markets are increasing at rapid pace. now, crystlline silicon solar cells markets screen-printing solar cell is occupying. screen-printing solar cells manufacturing process are very quick, there is a strong point which is a low cost. but silicon and metal contact, uses Ag & Al pates. because of, high contact resistance, high series resistance and sintering inside process the electric conductivity decreases with 1/3. and In pastes ingredients uses Ag where $80{\sim}90%$ is metal of high cost. because of low cost solar cells descriptions is difficult. therefore BCSC(Buried Contact Solar Cell) is developed. and uses light-induced plating, ln-line galvanization developed equipments. Ni/Cu matel contact solar cells researches. in Germany Fraunhofer ISE. In order to manufacture high-efficiency solar cells, metal selections are important. metal materials get in metal resistance does small, to be electric conductivity does highly. efficiency must raise an increase with rise of the curve factor where the contact resistance of the silicon substrate and is caused by few with decrement of series resistance. Ni metal materials the price is cheap, Ti comes similar resistance. Cu and Ag has the electric conductivity which is similar. and Cu price is cheap. In this paper, Ni/Cu/Ag metal contact cell with screen printing manufactured, silicon metal contact comparison and analysis.

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단결정 실리콘 태양전지를 위한 screen printing 전극과 photo lithography 다층전극의 적용에 대한 연구 (Application of Screen Printing and Photo Lithography Multi-layer Metal Contact for Single Crystalline Silicon Solar Cells)

  • 김도완;최준영;이은주;이수홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.109-109
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    • 2006
  • Screen printing (SP) metal contact is typically applied to the solar cells for mass production. However, SP metal contact has low aspect ratio, low accuracy, hard control of the substrate penetration and unclean process. On the other hand, photo lithograpy (PL) metal contact can reduce defects by metal contact. In this investigation, PL metal contact was obtained the multi-layer structure of Ti/Pd/Ag by e-beam process. We applied SP metal contact and PL metal contact to single crystalline silicon solar cells, and demonstrated the difference of conversion efficiency. Because PL metal contact silicon solar cell has Jsc (short circuit current density) better than silicon solar cell applied SP metal contact.

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Use of Hard Mask for Finer (<10 μm) Through Silicon Vias (TSVs) Etching

  • Choi, Somang;Hong, Sang Jeen
    • Transactions on Electrical and Electronic Materials
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    • 제16권6호
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    • pp.312-316
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    • 2015
  • Through silicon via (TSV) technology holds the promise of chip-to-chip or chip-to-package interconnections for higher performance with reduced signal delay and power consumption. It includes high aspect ratio silicon etching, insulation liner deposition, and seamless metal filling. The desired etch profile should be straightforward, but high aspect ratio silicon etching is still a challenge. In this paper, we investigate the use of etch hard mask for finer TSVs etching to have clear definition of etched via pattern. Conventionally employed photoresist methods were initially evaluated as reference processes, and oxide and metal hard mask were investigated. We admit that pure metal mask is rarely employed in industry, but the etch result of metal mask support why hard mask are more realistic for finer TSV etching than conventional photoresist and oxide mask.

Practical Silicon-Surface-Protection Method using Metal Layer

  • Yi, Kyungsuk;Park, Minsu;Kim, Seungjoo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.470-480
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    • 2016
  • The reversal of a silicon chip to find out its security structure is common and possible at the present time. Thanks to reversing, it is possible to use a probing attack to obtain useful information such as personal information or a cryptographic key. For this reason, security-related blocks such as DES (Data Encryption Standard), AES (Advanced Encryption Standard), and RSA (Rivest Shamir Adleman) engines should be located in the lower layer of the chip to guard against a probing attack; in this regard, the addition of a silicon-surface-protection layer onto the chip surface is a crucial protective measure. But, for manufacturers, the implementation of an additional silicon layer is burdensome, because the addition of just one layer to a chip significantly increases the overall production cost; furthermore, the chip size is increased due to the bulk of the secure logic part and routing area of the silicon protection layer. To resolve this issue, this paper proposes a practical silicon-surface-protection method using a metal layer that increases the security level of the chip while minimizing its size and cost. The proposed method uses a shift register for the alternation and variation of the metal-layer data, and the inter-connection area is removed to minimize the size and cost of the chip in a more extensive manner than related methods.

Fabrication of Ordered One-Dimensional Silicon Structures and Radial p-n Junction Solar Cell

  • Kim, Jae-Hyun;Baek, Seong-Ho
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.86-86
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    • 2012
  • The new approaches for silicon solar cell of new concept have been actively conducted. Especially, solar cells with wire array structured radial p-n junctions has attracted considerable attention due to the unique advantages of orthogonalizing the direction of light absorption and charge separation while allowing for improved light scattering and trapping. One-dimenstional semiconductor nano/micro structures should be fabricated for radial p-n junction solar cell. Most of silicon wire and/or pillar arrays have been fabricated by vapour-liquid-solid (VLS) growth because of its simple and cheap process. In the case of the VLS method has some weak points, that is, the incorporation of heavy metal catalysts into the growing silicon wire, the high temperature procedure. We have tried new approaches; one is electrochemical etching, the other is noble metal catalytic etching method to overcome those problems. In this talk, the silicon pillar formation will be characterized by investigating the parameters of the electrochemical etching process such as HF concentration ratio of electrolyte, current density, back contact material, temperature of the solution, and large pre-pattern size and pitch. In the noble metal catalytic etching processes, the effect of solution composition and thickness of metal catalyst on the etching rate and morphologies of silicon was investigated. Finally, radial p-n junction wire arrays were fabricated by spin on doping (phosphor), starting from chemical etched p-Si wire arrays. In/Ga eutectic metal was used for contact metal. The energy conversion efficiency of radial p-n junction solar cell is discussed.

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Application study of silicon impression material for reducing metal artifacts: preliminary study for head and neck cancer radiotherapy

  • So Hyun Park;Jinhyun Choi;Byungdo Park;Jeongho Kim;Heesoo Lim;Dae-Hyun Kim
    • Journal of Medicine and Life Science
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    • 제20권2호
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    • pp.83-88
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    • 2023
  • Metal artifacts cause inaccuracies in target delineation, radiation treatment planning, and delivery when computed tomography images of a radiotherapy patient implanted with a high-density material in the body are acquired. In this study, we investigated the possibility of obtaining improved images in clinical trials through metal artifact reduction using silicon impression materials without the need for a specific metal artifact reduction algorithm. A silicon impression material exhibiting a constant Hounsfield unit (HU) value according to the mixing ratio of the catalysts and bases was selected. The material did not exhibit any change in weight or shape over time. For both the instances of inserting the metal material and applying the silicon impression material, the HU value and dose were compared with homogeneous cases filled with water-equivalent materials. When the silicon impression material was applied to the region where the high-density material was located, the HU value was within 5% and the dose was within 3% compared with those of the homogeneous cases. In this study, the silicon impression materials reduced metal artifacts. However, because the composition, shape, size, and location of high-density materials differ, further studies are required to consider these factors in clinical applications.