• Journal of the Institute of Convergence Signal Processing
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• v.16 no.4
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• pp.162-167
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• 2015

This paper describes the reason and the problem solving for the double-layer pattern of a Daejeon correlator operated in Korea-Japan Correlation Center. When the electric power of an input signal in the correlator is charged small enough to be buried in the noise, it is hard to see a signal with a specific pattern in the input signal, but when the electric power is large, a specific one is reported to be seen. By comparing data from observation with one from software correlator, it was confirmed from the analysis using the AIPS software that the amplitude gain of a source signal was affected about 3%. Therefore, in order to solve the problem of double-layer patterns, we found that a problem in the memory management module responsible for both the data input and the data serialization of the correlator is a cause for the double-layer pattern detected periodically. In other words, while data is serialized and read repeatedly in the memory area assigned to serialize the data from the serialization module, redundant last data is generated and an overlap for the memory allocation is occurred. Therefore, by modifying the program of the FPGA memory sections on serialization module to correct the problem, we confirmed that double-layer pattern is disappeared and correlation results are normally acquired.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.6
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• pp.2160-2179
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• 2015

In many Radio Frequency Identification (RFID) applications, the reader recognizes the tags within its scope repeatedly. For these applications, some algorithms such as the adaptive query splitting algorithm (AQS) and the novel semi-blocking AQS (SBA) were proposed. In these algorithms, a staying tag retransmits its ID to the reader to be identified, even though the ID of the tag is stored in the reader's memory. When the length of tag ID is long, the reader consumes a long time to identify the staying tags. To overcome this deficiency, we propose a slot allocated blocking anti-collision algorithm (SABA). In SABA, the reader assigns a unique slot to each tag in its range by using a slot allocation mechanism. Based on the allocated slot, each staying tag only replies a short data to the reader in the identification process. As a result, the amount of data transmitted by the staying tags is reduced greatly and the identification rate of the reader is improved effectively. The identification rate and the data amount transmitted by tags of SABA are analyzed theoretically and verified by various simulations. The simulation and analysis results show that the performance of SABA is superior to the existing algorithms significantly.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.5
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• pp.3-10
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• 2004

A Wireless Lan has an importance of access control, because we can use wireless Internet via AP(Access Point). Moreover, to use wireless LAN, we will go through authentication process of EAP. DoS(Denial of Service) attack is one of the fatal attack about these AP access and authentication process. That is, if malicious attacker keeps away access of AP or consumes memory of server and calculation ability of CPU and etc. compulsorily in authentication process, legal user can't get any services. In this paper, we presents the way of protection against the each attack that is classified into access control, allocation of resource, attack on authentication protocol. The first thing, attack to access control, is improved by pre-verification and the parameter of security level. The second, attack of allocation of resource, is done by partial stateless protocol. And the weak of protocol is done by time-stamp and parameter of access limitation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.6
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• pp.1289-1300
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• 2011

In recent computer systems with high-performance, users execute programs needing large memory and programs intensively accessing files simultaneously. Such a large memory requirement makes virtual memory systems access swap spaces in disk, and intensive file accesses require file systems to access file system partitions in disk. Executing the two kinds of programs at once incurs large disk seeks between swap spaces and file system partitions frequently. To solve the problem, this paper proposes a new scheme called SAF to create several swap spaces in a file system partition, where pages to be paged out are stored. When a page is paged out, the scheme stores the page to one of the swap spaces close to a disk location where the most recently accessed file is located. The chosen swap space in the file system partition is closer to the disk location than the traditional swap space, so that our scheme can reduce the large disk seek time spent to move to the traditional swap space in paging out a page. The experiment of our scheme implemented in FreeBSD 6.2 shows that SAF reduces the execution time of several benchmarks over FreeBSD ranging from 14% to 42%.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.7 no.1
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• pp.81-98
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• 2013

Since Probabilistic Latent Semantic Analysis (PLSA) and Latent Dirichlet Allocation (LDA) were introduced, many revised or extended topic models have appeared. Due to the intractable likelihood of these models, training any topic model requires to use some approximation algorithm such as variational approximation, Laplace approximation, or Markov chain Monte Carlo (MCMC). Although these approximation algorithms perform well, training a topic model is still computationally expensive given the large amount of data it requires. In this paper, we propose a new method, called non-simultaneous sampling deactivation, for efficient approximation of parameters in a topic model. While each random variable is normally sampled or obtained by a single predefined burn-in period in the traditional approximation algorithms, our new method is based on the observation that the random variable nodes in one topic model have all different periods of convergence. During the iterative approximation process, the proposed method allows each random variable node to be terminated or deactivated when it is converged. Therefore, compared to the traditional approximation ways in which usually every node is deactivated concurrently, the proposed method achieves the inference efficiency in terms of time and memory. We do not propose a new approximation algorithm, but a new process applicable to the existing approximation algorithms. Through experiments, we show the time and memory efficiency of the method, and discuss about the tradeoff between the efficiency of the approximation process and the parameter consistency.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.3 s.309
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• pp.20-29
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• 2006

The Java language has been established as one of the most widely used language due to its object-oriented programming, safety and flexibility and the garbage collection of the virtual machine has relieved programmers of many difficulties related to the memory management. In the embedded environment, Java is also prevalent, the virtual machine and garbage collector that takes into account the embedded environment is required. In this paper we manage the heap memory area by dividing into young generation and old generation, and we propose a garbage collector in which appropriate techniques are applied to each generation to utilize the different characteristics of each generation. Also, we propose the write barrier technique and double filtering technique for efficient garbage recognition, and double check method for determining and reclaiming the garbage with cyclic structure. The proposed method satisfies the embedded environment's requirements of fast object allocation, real time property, recollection of all the garbage, elimination of fragmentations and high locality.

• Journal of Korea Society of Industrial Information Systems
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• v.16 no.1
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• pp.37-48
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• 2011

Sensor networks monitor the environment, collect sensed data, and relay the data back to a collection point. Although sensor nodes have very limited hardware resources, they require an operating system that can provide efficient resource management and various application environments. In addition, the wireless sensor networks require the code update previously deployed to patch bugs in program and to improve performance of kernel service routines and application programs. This paper presents EPRCU (Easy to Perform Remote Code Update), a new operating system for wireless sensor nodes, which has enhanced functionalities to perform remote code update. To achieve an efficient code update, the EPRCU provides dynamic memory allocation and program memory management. It supports the event-driven kernel, which uses priority-based scheduling with the application of aging techniques. Therefore, the proposed operating system is not only easy to perform wireless communication with the remote code update but also suitable for various sensor network applications.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.11
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• pp.572-580
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• 2007

Wireless sensor networks are sensing, computing and communication infrastructures that allow us to monitor, instrument, observe, and respond to phenomena in the harsh environment. Generally, the wireless sensor networks are composed of many deployed sensor nodes that were designed to be very cost-efficient in terms of production cost. For example, UC Berkeley's MICA motes have only 8-bit CPU, 4KB RAM, and 128KB FLASH memory space. Therefore, sensor operating systems that run on the sensor nodes should be able to operate efficiently in terms of the resource management. In this paper, we present a dynamic threads stack management scheme for space-constrained and multi-threaded sensor operating systems. In this scheme, the necessary stack space of each function is measured on compile-time. Then, the information is used to dynamically allocate and release each function's stack space on run-time. It was implemented in Nano-Qplus sensor operating system. Our experimental results show that the proposed scheme outperforms the existing fixed-size stack allocation mechanism.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.5
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• pp.385-393
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• 2021

This study proposes a multi-core-based controller design for an ESC(Electronic Stability Control) system in an automotive multi-core processor. Considering the architectures of an automotive multi-core processor and an ESC system, the overall execution time has been optimized for multi-core platforms. The function module assignment, synchronization between cores, and memory assignment for core-dependent variables in automotive multi-core systems are evaluated. The ESC controller comprising five function modules is used herein. Based on the proposed design, the single-core controller is extended to multi-core controllers. Using multi-core optimization methods, such as function module assignment, semaphore, interrupt awakening, and variable assignment over cores, the ESC system is redesigned to a multi-core controller. Experimental results reveal that the execution time for the multi-core processor is reduced by 59.7% compared with that for the single-core processor.

• Journal of Advanced Navigation Technology
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• v.11 no.3
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• pp.296-305
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• 2007

The HiLow, a hierarchical routing protocol for 6LoWPAN, needs smaller memory allocation and energy than other routing protocols. However, the HiLow has a weak point that does not provide the optimized routing path. In this paper, we propose the algorithm that can find the optimum next hop using neighboring nodes around the source node as well as hierarchical routing path information. We evaluate the performance of proposed algorithm using the computer simulation, and we can acquire results that decreases a number of hop count and transmitted message.