• Journal of KIISE:Computer Systems and Theory
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• v.32 no.7
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• pp.349-358
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• 2005

False sharing is a result of co-location of unrelated data in the same unit of memory coherency, and is one source of unnecessary overhead being of no help to keep the memory coherency in multiprocessor systems. Moreover. the damage caused by false sharing becomes large in proportion to the granularity of memory coherency. To reduce false sharing in a page-based DSM system, it is necessary to allocate unrelated data objects that have different access patterns into the separate shared pages. In this paper we propose call-site tracing-based shared memory allocator. shortly CSTallocator. CSTallocator expects that the data objects requested from the different call-sites may have different access patterns in the future. So CSTailocator places each data object requested from the different call-sites into the separate shared pages, and consequently data objects that have the same call-site are likely to get together into the same shared pages. We use execution-driven simulation of real parallel applications to evaluate the effectiveness of our CSTallocator. Our observations show that by using CSTallocator a considerable amount of false sharing misses can be additionally reduced in comparison with the existing techniques.

• Journal of the Korea Computer Graphics Society
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• v.14 no.1
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• pp.27-33
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• 2008

Mobile systems have relatively limited resources such as low memory, slow CPU, or low power comparing to desktop systems. In this paper, we present a new 3D mesh connectivity coding algorithm especially optimized for mobile systems(i.e., mobile phones). By using adaptive octree data structure for vertex positions, a new distance-based connectivity coding is proposed. Our algorithm uses fixed point arithmetic and minimizes dynamic memory allocation, appropriate for mobile systems. We also demonstrate test data to show the utility of our mobile 3D mesh codec.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.5
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• pp.1017-1026
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• 2012

Due to acceleration of the IT industry and the environment for a variety of media in modern society, such as real-time video images 3D-TV is a very important issue. These high-quality live video is being applied to various fields such as CCTV footage has become an important performance parameters. However, these high quality images, even vulnerable because of shortcomings secure channel or by using various security algorithms attempt to get rid of these disadvantages are underway very active. These shortcomings, this study added extra security technologies to reduce the processing speed image processing itself, but by adding security features to transmit real-time processing and security measures for improving the present.

• Journal of architectural history
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• v.5 no.2 s.10
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• pp.83-95
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• 1996

Computerized visual database construction of architectural precedents has just begun in some research institutes in the world. In Korea the first visual database has shown its testl version by S architectural design firm in september 1996. In this article the author discusses the historical contexts and the recent computerization cases, the traits, the uses and the limits of architectural visual database system of precedents. The forms and contents of data fields in two cases are compared with a focus on the description of architectural traits of each data entry. Compared to the KIA format, the S database has better performance for architectural design reference because it collects more pictures and drawings and larger texts for the field of architectural chracteristics. But this latter also is constrained by its capacity of memory and so lacks the reciprocity of the DOORS in the Graduate School of Design, Harvard University. A visual database system which has more flexible allocation of memory and respondent with the users is yet to be prepared. But this system also should be maintained by some experts in architectural history, theory and criticism, because their knowledge is essential for selection of precedents and revision of the data description. A full-fledged electronic visual database in architecture will not only save much effort for the architect, but also will change the architects' design behavior. Nevertheless this does not mean the automatic promotion of architects' creativity.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.12
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• pp.4776-4798
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• 2015

The location selection of virtual machines in distributed cloud is difficult because of the physical resource distribution, allocation of multi-dimensional resources, and resource unit cost. In this study, we propose a multi-object virtual machine location selection algorithm (MOVMLSA) based on group information, doubly linked list structure and genetic algorithm. On the basis of the collaboration of multi-dimensional resources, a fitness function is designed using fuzzy logic control parameters, which can be used to optimize search space solutions. In the location selection process, an orderly information code based on group and resource information can be generated by adopting the memory mechanism of biological immune systems. This approach, along with the dominant elite strategy, enables the updating of the population. The tournament selection method is used to optimize the operator mechanisms of the single-point crossover and X-point mutation during the population selection. Such a method can be used to obtain an optimal solution for the rapid location selection of virtual machines. Experimental results show that the proposed algorithm is effective in reducing the number of used physical machines and in improving the resource utilization of physical machines. The algorithm improves the utilization degree of multi-dimensional resource synergy and reduces the comprehensive unit cost of resources.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.3
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• pp.89-99
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• 1995

In this paper, we ecamined the effect that MCM-L technique influencess on the design and fabrication of multichip memory modules in increasing the packing desity of memory capacity and maximizing its electrical characteristics. For that purpose, we examined the effective methods of reducing the area of module layout and the wiring length with the variation of chip allocation and the number of wiring layers. We fabricated a 256K${\times}$8bit SRAM module with eight 32K${\times}$8bit SRAM chips. The routing experiment showed that we could optimize the area of module layout and wiring length by placing chips in a row, arranging module I/O pads parallel to chip I/O pads, and equalizing the number of terminal sides of module I/O's to that of chip I/O's. The routing was optimized when we used three wire layers in case of one sided chip mounting or five wire layers in case of double sided chip mounting. The fabricated modules showed 18.9 cm/cm$^{2}$ in wiring density, 65 % in substrate occupancy efficiency, and module substrate and functionally tested to find out the module working perfectly.

• The Transactions of the Korea Information Processing Society
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• v.2 no.3
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• pp.364-373
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• 1995

We propose a probabilistic design method and performance analysis in the area of dynamic data structures. We assign two stacks to a block which consists of m contiguous memory cells. Frequencies of delete and insert operations are not fixed, but depend on stack heights. We present various probabilistic schema and a rigorous performance analysis for a random memory allocation. Especially, stack coillision problem is studied and exponential increase of the mean of collision time as mlongrightarrow$\infty$is showed. We also present general mathematical schema which can be applied to the performance problems of finite automata and other computer information systems.

• The Journal of Asian Finance, Economics and Business
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• v.8 no.8
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• pp.297-309
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• 2021

In this study, to capture the skewness and kurtosis detected in both conditional and unconditional return distributions of the stock markets of Kazakhstan and Russia, two versions of normal mixture GARCH models are employed. The data set consists of daily observations of the Kazakhstan and Russia stock prices, and world crude oil price, covering the period from 1 June 2006 through 1 March 2021. From the empirical results, incorporating the long memory effect on the returns not only provides better descriptions of dynamic behaviors of the stock market prices but also plays a significant role in improving a better understanding of the return dynamics. In addition, normal mixture models for time-varying volatility provide a better fit to the conditional densities than the usual GARCH specifications and has an important advantage that the conditional higher moments are time-varying. This implies that the volatility skews implied by normal mixture models are more likely to exhibit the features of risk and the direction of the information flow is regime-dependent. The findings of this study contain useful information for diverse purposes of cross-border stock market players such as asset allocation, portfolio management, risk management, and market regulations.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.3
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• pp.896-915
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• 2023

The network function virtualization (NFV) uses virtualization technology to separate software from hardware. One of the most important challenges of NFV is the resource management of virtual network functions (VNFs). According to the dynamic nature of NFV, the resource allocation of VNFs must be changed to adapt to the variations of incoming network traffic. However, the significant delay may be happened because of the reallocation of resources. In order to balance the performance between delay and quality of service, this paper firstly made a compromise between VNF migration and energy consumption. Then, the long short-term memory (LSTM) was utilized to forecast network traffic. Also, the asymmetric loss function for LSTM (LO-LSTM) was proposed to increase the predicted value to a certain extent. Finally, an experiment was conducted to evaluate the performance of LO-LSTM. The results demonstrated that the proposed LO-LSTM can not only reduce migration times, but also make the energy consumption increment within an acceptable range.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.6
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• pp.293-303
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• 2008

As the computing environment moves to the wireless and handheld system, the power efficiency is getting more important. That is the case especially in the embedded hand-held system and the power consumed by the memory system takes the second largest portion in overall. To save energy consumed in the memory system we can utilize low power mode of SDRAM. In the case of RDRAM, nap mode consumes less than 5% of the power consumed in active or standby mode. However hardware controller itself can't use this facility efficiently unless the operating system cooperates. In this paper we focus on how to minimize the number of active units of SDRAM. The operating system allocates its physical pages so that only a few units of SDRAM need to be activated and the unnecessary SDRAM can be put into nap mode. This work can be considered as a generalized and system-wide version of PAVM(Power-Aware Virtual Memory) research. We take all the physical memory into account, especially buffer cache, which takes an half of total memory usage on average. Because of the portion of buffer cache and its importance, PAVM approach cannot be robust without taking the buffer cache into account. In this paper, we analyze the RAM usage and propose power-aware page allocation policy. Especially the pages mapped into the process' address space and the buffer cache pages are considered. The relationship and interactions of these two kinds of pages are analyzed and exploited for energy saving.