• Sleep Medicine and Psychophysiology
• /
• v.4 no.1
• /
• pp.1-14
• /
• 1997

This paper reviewed models to explain memory and neuropsychological tests to assess memory. Memory was explained in cognitive and neuroanatomical perspectives, Cognitive model describes memory as structure and process. In structure model, memory is divided into three systems: sensory memory, short-term memory(working memory), and long-term memory. In process model, there are broadly three categories of memory process: encoding, storage, and retrieval. Memory process work in memory structure. There are two prominent models of the neuroanatomy of memory, derived from the work of Mishkin and Appenzeller and that of Squire and Zola-Morgan. These two models are the most useful for the clinician in part because they take into account the connections between the limbic and frontal cortical regions. The major difference between the two models concerns the role of the amygdala in memory processess. Mishkin and his colleagues believe that the amygdala plays a significant role while Squire and his colleagues do not. The most popular and widely used tests of memory ability such as WMS-R, AVLT, CVLT, HVLT. RBMT, CFT, and BVRT-R, were reviewed.

• Korean Linguistics
• /
• v.79
• /
• pp.91-116
• /
• 2018

This paper aims at proposing issues of breath and memory in speech based on the quantitative analysis of breath groups and pause units in Korean. As a human being, we have two kinds of limitations on continuing speech; breath and memory. The prosodic structure and temporal structure of spontaneous speech data from six speakers were closely examined. One of the main findings of the present study is that the prosodic structure and temporal structure of Korean appears to reflect the breath and memory problems in speech.

• Proceedings of the KSRS Conference
• /
• 2004.10a
• /
• pp.673-676
• /
• 2004

To manage and query moving objects efficiently in MMDBMS, a memory index structure should be used. The most popular index structure for storing trajectories of moving objects is 3DR-tree. The 3DR-tree also can be used for MMDBMS. However, the volume of data can exceed the capacity of physical memory since moving objects report their locations continuously. To accommodate new location reports, old trajectories should be migrated to disk or purged from memory. This paper focuses on migration policies of a main memory index structure. Migration policies consist of two steps: (i) node selection, (ii) node placement. The first step (node selection) selects nodes that should be migrated to disk. The criteria of selection are the performance of insertion or query. The second step (node placement) determines the order of nodes written to disk. This step can be thought as dynamic declustering policies.

• East Asian Economic Review
• /
• v.18 no.4
• /
• pp.367-394
• /
• 2014

In this study, we examined the fractal structure of the Nikkei225, HangSeng, Shanghai Stock Exchange and Straits Times Index of Singapore. Empirical analysis was performed via non-parametric, semi-parametric long memory tests and also fractal dimension calculations. In order to avoid spurious long memory features, besides the Detrended Fluctuations Analysis (DFA), we also used Smith's (2005) modified GPH method. As for fractal dimension calculations, they were conducted via Box-Counting and Variation (p=1) tests. According to the results, while there is no long memory property in log returns of any index, we found evidence for long memory properties in the volatility of the HangSeng, the Shanghai Stock Exchange and the Straits Times Index. However, we could not find any sign of long memory in the volatility of Nikkei225 index using either the DFA or modified GPH test. Fractal dimension analysis also demonstrated that all raw index prices have fractal structure properties except for the Nikkei225 index. These findings showed that the Nikkei225 index has the most efficient market properties among these markets.

• Journal of Information Processing Systems
• /
• v.16 no.3
• /
• pp.588-598
• /
• 2020

An alternative state estimation filtering algorithm is designed for continuous time systems with noises as well as control input. Two kinds of estimation filters, which have different measurement memory structures, are operated selectively in order to use both filters effectively as needed. Firstly, the estimation filter with infinite memory structure is operated for a certain continuous time system. Secondly, the estimation filter with finite memory structure is operated for temporarily uncertain continuous time system. That is, depending on the presence of uncertainty, one of infinite memory structure and finite memory structure filtered estimates is operated selectively to obtain the valid estimate. A couple of test variables and declaration rule are developed to detect uncertainty presence or uncertainty absence, to operate the suitable one from two kinds of filtered estimates, and to obtain ultimately the valid filtered estimate. Through computer simulations for a continuous time aircraft engine system with different measurement memory lengths and temporary model uncertainties, the proposed state estimation filtering algorithm can work well in temporarily uncertain as well as certain continuous time systems. Moreover, the proposed state estimation filtering algorithm shows remarkable superiority to the infinite memory structure filtering when temporary uncertainties occur in succession.

• KIPS Transactions on Computer and Communication Systems
• /
• v.2 no.11
• /
• pp.461-470
• /
• 2013

This paper proposes high speed kernel data collection method for analysis of memory workload, using technique of direct access to process's memory management structure. The conventional analysis tools have a slower data collection speed and they are lack of scalability due to collection only formalized memory information. The proposed method collects kernel data much faster than the conventional methods using technique of direct collect to process's memory information, page table, page structure in the memory management structure, and it can collect data which user wanted. We collect memory management data of the running process, and analyze its memory workload.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.215-216
• /
• 2008

Ultra wideband (UWB) system is one of the promising solutions for future short-range communication which has recently received a great attention by many researchers. In this paper, we proposed 128-point low power FFT structure based on the memory for UWB systems. The proposed structure can improve implementation area and power consumption efficiency as it consists of one of the butterfly PE and a little memory.

• International Journal of Contents
• /
• v.3 no.1
• /
• pp.19-23
• /
• 2007

Recently, several main-memory index structures have been proposed to reduce the impact of secondary cache misses. In mainmemory storage systems, secondary cache misses have a substantial effect on the performance of index structures. However, recent studies still stiffer from secondary cache misses when visiting each level of index tree. In this paper, we propose a new index structure that minimizes the total amount of cache miss latency. The proposed index structure prefetched grandchildren of a current node. The basic structure of the proposed index structure is based on that of the CSB+-Tree, which uses the concept of a node group to increase fan-out. However, the insert algorithm of the proposed index structure significantly reduces the cost of a split. The superiority of our algorithm is shown through performance evaluation.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.4 no.3
• /
• pp.209-216
• /
• 2011

Recently the design of SoCs(System-on-Chips) in which TCM is embedded for high speed operation increases rapidly. In this paper, a parallel test structure for eDRAM-based TCM embedded in SoCs is proposed. In the presented technique, the MUT (Memory Under Test) is changed to parallel structure and it increases testability of MUT with boundary scan chains. The eDRAM is designed in structure for parallel test so that it can be tested for each modules. Dynamic test can be performed based on input-output data. The proposed techniques are verified their performance by circuits simulation.

• 한국전산유체공학회:학술대회논문집
• /
• 2011.05a
• /
• pp.117-123
• /
• 2011

The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.