• 제목/요약/키워드: Memory Improvement

검색결과 698건 처리시간 0.03초

Memory-improving Effects of Fermented Sea Tangle Saccharina japonica in Normal Mice (정상 동물모델에서 다시마(Saccharina japonica) 발효물의 기억력 개선 효과)

  • Ryu, Jehkwang;Jo, Young-Hong;Chang, Seong-Jun;Lee, Bae-Jin
    • Korean Journal of Fisheries and Aquatic Sciences
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    • 제49권2호
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    • pp.131-136
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    • 2016
  • Marine organisms are sources of many bioactive compounds, such as essential fatty acids, essential amino acids, vitamins, and minerals, making them useful candidates for the production of safe bioactive substances. They also synthesize glutamic acid, which can be used to produce γ-aminobutyric acid (GABA), the major inhibitory neurotransmitter in the central nervous system (CNS), via fermentation with Lactobacillus brevis BJ-20. This study investigated the degree to which fermented sea tangle (FST) inhibits enzymes such as acetylcholine esterase (AChE) and prolyl endopeptidase (PEP) and affects memory of normal mice using the T-maze test. FST inhibited more than 90% of AChE at 1 mg/mL and 50% of PEP at 8 mg/mL. Oral FST (100 mg/kg) significantly improved performance of normal mice on the T-maze. Therefore, sea tangle fermented with L. brevis BJ20 effectively contributes to memory improvement and might be a useful functional food ingredient.

Garbage Collection Technique for Reduction of Migration Overhead and Lifetime Prolongment of NAND Flash Memory (낸드 플래시 메모리의 이주 오버헤드 감소 및 수명연장을 위한 가비지 컬렉션 기법)

  • Hwang, Sang-Ho;Kwak, Jong Wook
    • IEMEK Journal of Embedded Systems and Applications
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    • 제11권2호
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    • pp.125-134
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    • 2016
  • NAND flash memory has unique characteristics like as 'out-place-update' and limited lifetime compared with traditional storage systems. According to out-of-place update scheme, a number of invalid (or called dead) pages can be generated. In this case, garbage collection is needed to reclaim invalid pages. Because garbage collection results in not only erase operations but also copy operations of valid (or called live) pages to other blocks, many garbage collection techniques have proposed to reduce the overhead and to increase the lifetime of NAND Flash systems. This techniques sometimes select victim blocks including cold data for the wear leveling. However, most of them overlook the cost of selecting victim blocks including cold data. In this paper, we propose a garbage collection technique named CAPi (Cost Age with Proportion of invalid pages). Considering the additional overhead of what to select victim blocks including cold data, CAPi improves the response time in garbage collection and increase the lifetime in memory systems. Additionally, the proposed scheme also improves the efficiency of garbage collection by separating cold data from hot data in valid pages. In experimental evaluation, we showed that CAPi yields up to, at maximum, 73% improvement in lifetime compared with existing garbage collections.

Ethernet-Based Avionic Databus and Time-Space Partition Switch Design

  • Li, Jian;Yao, Jianguo;Huang, Dongshan
    • Journal of Communications and Networks
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    • 제17권3호
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    • pp.286-295
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    • 2015
  • Avionic databuses fulfill a critical function in the connection and communication of aircraft components and functions such as flight-control, navigation, and monitoring. Ethernet-based avionic databuses have become the mainstream for large aircraft owning to their advantages of full-duplex communication with high bandwidth, low latency, low packet-loss, and low cost. As a new generation aviation network communication standard, avionics full-duplex switched ethernet (AFDX) adopted concepts from the telecom standard, asynchronous transfer mode (ATM). In this technology, the switches are the key devices influencing the overall performance. This paper reviews the avionic databus with emphasis on the switch architecture classifications. Based on a comparison, analysis, and discussion of the different switch architectures, we propose a new avionic switch design based on a time-division switch fabric for high flexibility and scalability. This also merges the design concept of space-partition switch fabric to achieve reliability and predictability. The new switch architecture, called space partitioned shared memory switch (SPSMS), isolates the memory space for each output port. This can reduce the competition for resources and avoid conflicts, decrease the packet forwarding latency through the switch, and reduce the packet loss rate. A simulation of the architecture with optimized network engineering tools (OPNET) confirms the efficiency and significant performance improvement over a classic shared memory switch, in terms of overall packet latency, queuing delay, and queue size.

An Implementation of a Feature Extraction Hardware Accelerator based on Memory Usage Improvement SURF Algorithm (메모리 사용률을 개선한 SURF 알고리즘 특징점 추출기의 하드웨어 가속기 설계)

  • Jung, Chang-min;Kwak, Jae-chang;Lee, Kwang-yeob
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 한국정보통신학회 2013년도 추계학술대회
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    • pp.77-80
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    • 2013
  • SURF algorithm is an algorithm to extract feature points and to generate descriptors from input images. It is robust to change of environment such as scale, rotation, illumination and view points. Because of these features, it is used for many image processing applications such as object recognition, constructing panorama pictures and 3D image restoration. But there is disadvantage for real time operation because many recognition algorithms such as SURF algorithm requires a lot of calculations. In this paper, we propose a design of feature extractor and descriptor generator based on SURF for high memory efficiency. The proposed design reduced a memory access and memory usage to operate in real time.

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Improvement of Memory Impairment of Green Tea Extract/L-Theanine Through Inhibition of Secretase Activity and Cell Death In Vivo (녹차추출물/L-Theanine 혼합물의 Secretase 활성 억제 및 세포사 억제를 통한 기억력 회복능)

  • Kim, Tae-Il;Yuk, Dong-Yeon;Park, Sang-Ki;Park, Hyoung-Kook;Yoon, Yeo-Kyeung;Hong, Jin-Tae
    • YAKHAK HOEJI
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    • 제52권5호
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    • pp.384-393
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    • 2008
  • We examined the effect of green tea extract (GTE) and L-theanine combination on the $A{\beta}_{1-42}$-induced memory dysfunction. GTE and combination were administrated into mice for 3 weeks followed by injection of $A{\beta}_{1-42}$ to induce memory impairment. GTE and L-theanine administration significantly improved cognitive ability and reduced $A{\beta}_{1-42}$ level accompanied with the inhibition of neuronal cell death and activities of secretase. These results suggest that GTE and L-theanine combination may be a useful for preventing for the development or progression of Alzheimer's disease.

Improvement of Memory Efficiency in Hierarchical Control Structure described by SFC (SFC로 기술(記述)된 계층제어 구조에서 메모리 효율 향상)

  • You, Jeong-Bong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • 제7권2호
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    • pp.126-130
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    • 2006
  • Programmable Logic Controller(PLC) is the most widely utilized and plays an important role in industrial control system. Sequential Function Chart(SFC) is a graphic language which is suitable for describing a sequential control logic in discrete control system. We can design a distribute control construction and a hierarchical control construction in process control system described by SFC. In hierarchical control structure, we construct each subsystems to synchronize a synchronous signal between subsystems, and the command system gives and takes a synchronous signal with subsystems. Therefore, the system has a low memory efficiency and a low system performance. In this paper, we propose the method that improved the efficiency of memory in hierarchical control construction, and confirm its feasibility through an actual example.

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Effects of Computerized Neurocognitive Function Program Induced Memory and Attention for Patients with Stroke (전산화 신경인지기능 프로그램(COMCOG, CNT)을 이용한 뇌졸중 환자의 기억력과 주의력 증진효과)

  • Shim, Jae-Myoung;Kim, Hwan-Hee;Lee, Yong-Seok
    • The Journal of Korean Physical Therapy
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    • 제19권4호
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    • pp.25-32
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    • 2007
  • Purpose: The purpose of this study was to evaluate the effect of computerized neurocognitive function program on cognitive function about memory and attention with stroke. Methods: 24subjects with stroke were recruited. Twelve of subjects received conventional therapy including physical therapy, occupational therapy and language therapy. Another subjects received additional computer assisted cognitive training using Computer-aided Cognitive rehabilitation training system(COMCOG, MaxMedica Inc., 2004). All patients were assessed their cognitive function of memory and attention using Computerized Neurocognitive Function Test(CNT, MaxMedica Inc., 2004) before treatment and 6 weeks after treatment. Results: Before the treatment, two groups showed no difference in cognitive function(p>0.05). After 6 weeks, two groups showed significantly difference in digit span (forward, backward), verbal learning(A5, $A1{\sim}A5$), auditory CPT(n), visual CPT(n)(p<0.05). After treatment, the experimental group showed a significant improvement of digit span(forward, backward), verbal learning(A5, $A1{\sim}A5$), visual span (forward, backward), auditory CPT(n, sec), visual CPT(n, sec), and trail-making (A, B)(p<0.05). Conclusion: Computerized neurocognitive function program would be improved cognitive function of memory and attention in patients with stoke.

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Improvement of Address Pointer Assignment in DSP Code Generation (DSP용 코드 생성에서 주소 포인터 할당 성능 향상 기법)

  • Lee, Hee-Jin;Lee, Jong-Yeol
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • 제45권1호
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    • pp.37-47
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    • 2008
  • Exploitation of address generation units which are typically provided in DSPs plays an important role in DSP code generation since that perform fast address computation in parallel to the central data path. Offset assignment is optimization of memory layout for program variables by taking advantage of the capabilities of address generation units, consists of memory layout generation and address pointer assignment steps. In this paper, we propose an effective address pointer assignment method to minimize the number of address calculation instructions in DSP code generation. The proposed approach reduces the time complexity of a conventional address pointer assignment algorithm with fixed memory layouts by using minimum cost-nodes breaking. In order to contract memory size and processing time, we employ a powerful pruning technique. Moreover our proposed approach improves the initial solution iteratively by changing the memory layout for each iteration because the memory layout affects the result of the address pointer assignment algorithm. We applied the proposed approach to about 3,000 sequences of the OffsetStone benchmarks to demonstrate the effectiveness of the our approach. Experimental results with benchmarks show an average improvement of 25.9% in the address codes over previous works.

Augmentative Effects of Working Memory Training on Behavioral Problems and Parental Stress in Medicated Children and Adolescents with Attention-Deficit Hyperactivity Disorder (약물치료 중인 주의력결핍 과잉행동장애 아동 청소년에서 작업기억훈련이 행동문제와 부모 스트레스에 미치는 부가적 효과)

  • Lee, Eun Kyung;Kim, Hye Sun;Yoo, Hanik K.
    • Journal of the Korean Academy of Child and Adolescent Psychiatry
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    • 제28권2호
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    • pp.115-122
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    • 2017
  • Objectives: Executive dysfunctions including working memory deficit have been suggested to be one of the major neuropsychological etiologies of attention-deficit hyperactivity disorder (ADHD). The purpose of this study was to investigate the augmentative effects of working memory training on the behavioral problems, quality of life, and parental stress of medicated children with ADHD. Methods: Twenty-five children with ADHD, aged 9 to 19 years, who were being treated with ADHD medication, were included. The participants were trained with a commercially available and computerized working memory program ($Cogmed^{(R)}$) for 5 weeks without any alteration of their medication. The Child Behavior Checklist (CBCL), KIDSCREEN-52 quality of life measure, and Parenting Stress Index-Short Form (PSI-SF) were administered before training, and 4 weeks and 7 months after training, respectively. Results: After completing the training, the anxiety/depression, social problems, thought problems, attention problems, aggressive behavior, and externalizing problems scores in the CBCL were significantly reduced. The score on the Parent-child dysfunctional interaction in the PSI-SF was also decreased. However, the scores related to the quality of life were not changed. These changes were still observed 7 months after the training. Conclusion: Cogmed working memory training can be a promising training option for the additional improvement of behavioral problems and parental stress in medicated children with ADHD.

An Aging Measurement Scheme for Flash Memory Using LDPC Decoding Information

  • Kang, Taegeun;Yi, Hyunbean
    • Journal of the Korea Society of Computer and Information
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    • 제25권1호
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    • pp.29-36
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    • 2020
  • Wear-leveling techniques and Error Correction Codes (ECCs) are essential for the improvement of the reliability and durability of flash memories. Low-Density Parity-Check (LDPC) codes have higher error correction capabilities than conventional ECCs and have been applied to various flash memory-based storage devices. Conventional wear-leveling schemes using only the number of Program/Erase (P/E) cycles are not enough to reflect the actual aging differences of flash memory components. This paper introduces an actual aging measurement scheme for flash memory wear-leveling using LDPC decoding information. Our analysis, using error-rates obtained from an flash memory module, shows that LDPC decoding information can represent the aging degree of each block. We also show the effectiveness of the wear-leveling based on the proposed scheme through wear-leveling simulation experiments.