• The KIPS Transactions:PartC
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• v.9C no.4
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• pp.453-458
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• 2002

Recently, the number of hacking, that use buffer overflow vulnerabilities, are increasing. Although the buffer overflow Problem has been known for a long time, for the following reasons, it continuos to present a serious security threat. There are three defense method of buffer overflow attack. First, allow overwrite but do not allow unauthorized change of control flow. Second, do not allow overwriting at all. Third, allow change of control flow, but prevents execution of injected code. This paper is for allowing overwrites but do not allow unauthorized change of control flow which is the solution of extending compiler. The previous defense method has two defects. First, a program company with overhead because it do much thing before than applying for the method In execution of process. Second, each time function returns, it store return address in reserved memory created by compiler. This cause waste of memory too much. The new proposed method is to extend compiler, by processing after compiling and linking time. To complement these defects, we can reduce things to do in execution time. By processing additional steps after compile/linking time and before execution time. We can reduce overhead.

• Journal of KIISE:Computing Practices and Letters
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• v.12 no.4
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• pp.254-263
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• 2006

Ontology-based context models are widely used in ubiquitous computing environment because they have advantages in the acquisition of conceptual context through inferencing, context sharing, and context reusing. Among the benefits, inferencing enables context-aware applications to use conceptual contexts which cannot be acquired by sensors. However, inferencing causes processing delay and thus becomes the major obstacle to the implementation of context-aware applications. The delay becomes longer as the amount of contexts increases. In this paper, we propose a context pre-fetching method to reduce the size of contexts to be processed in a working memory in attempt to speed up inferencing. For this, we extend the query-tree method to identify contexts relevant to the queries of a context-aware application. Maintaining the pre-fetched contexts optimal in a working memory, the processing delay of inference reduces without the loss of the benefits of ontology-based context model. We apply the proposed scheme to our ubiquitous computing middleware, Active Surroundings, and demonstrate the performance enhancement by experiments.

• Journal of the Korea Computer Graphics Society
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• v.6 no.4
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• pp.35-42
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• 2000

3D texture mapping generates highly natural visual effects in which objects appear carved from lumps of materials rather than laminated with thin sheets as in 2D texture mapping. Storing 3D texture images in a table for fast mapping computations, instead of evaluating procedures on the fly, however, has been considered impractical due to the extremely high memory requirement. Recently, a practical real-time 3D texture mapping technique was proposed in [11], where they attempt to resolve the potential texture memory problem by compressing 3D textures using a wavelet-based encoding method. In this paper, we consider two other encoding schemes that could also be applied to the compression-based 3D texture mapping. In particular, we extend the vector quantization and FXT1 for 3D texture compression, and compare their performance with the wavelet-based encoding scheme.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.3
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• pp.3-10
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• 2009

In this paper, we introduce improved differential and linear attacks on the SMS4 block cipher which is used in the Chinese national standard WAPI (WLAN Authentication and Privacy Infrastructure, WLAN - Wireless Local Area Network): First, we introduce how to extend previously known differential attacks on SMS4 from 20 or 21 to 22 out of the full 32 rounds. Second, we improve a previously known linear attack on 22-round reduced SMS4 from $2^{119}$ known plaintexts, $2^{109}$ memory bytes, $2^{117}$ encryptions to $2^{117}$ known plaintexts, $2^{l09}$ memory bytes, $2^{112.24}$ encryptions, by using a new linear approximation.

• Journal of Mechanical Science and Technology
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• v.20 no.1
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• pp.110-124
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• 2006

The multi scale wavelet-Galerkin method implemented in an adaptive manner has an advantage of obtaining accurate solutions with a substantially reduced number of interpolation points. The method is becoming popular, but its numerical efficiency still needs improvement. The objectives of this investigation are to present a new numerical scheme to improve the performance of the multi scale adaptive wavelet-Galerkin method and to give detailed implementation procedure. Specifically, the subdomain technique suitable for multiscale methods is developed and implemented. When the standard wavelet-Galerkin method is implemented without domain subdivision, the interaction between very long scale wavelets and very short scale wavelets leads to a poorly-sparse system matrix, which considerably worsens numerical efficiency for large-sized problems. The performance of the developed strategy is checked in terms of numerical costs such as the CPU time and memory size. Since the detailed implementation procedure including preprocessing and stiffness matrix construction is given, researchers having experiences in standard finite element implementation may be able to extend the multi scale method further or utilize some features of the multiscale method in their own applications.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.281-284
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• 2008

Recently, Khronos institude OpenGL ES 2.0 API for support Shader 3.0 model that can possible variable graphic processing. For this reason, the mobile device have need of supporting processor for a shader 3.0 model. We should extend instruction's length to support OpenGL ES 2.0 API, so we need more memory size. In this paper, we propose a new instruction form that adopted variable length and unit instruction architecture. This proposed instruction architecture that support to Shader 3.0 model has consist of 32bit unit instructions up to 4 which can be combined for embellishing each other. Therefore, it can execute flexible instruction combination and reduce waste of instruction fields.

• Journal of IKEEE
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• v.12 no.2
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• pp.118-123
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• 2008

The Khronos group releases OpenGL ES 2.0 API specification bringing streamlined shader programming to graphics processor of embedded system. For this reason, the mobile devices have need of graphics processor for supporting a OpenGL ES 2.0 API. We need to extend instruction`s length to support OpenGLES 2.0 API, so it needs more memory size. In this paper, we propose a new instruction format that offers availability for use the instructions. This proposed instruction adopt a variable length method and unit instruction architecture. This proposed instruction architecture that support to OpenGLES 2.0 API has consist of 32bit unit instructions up to 4 which can be combined for embellishing each other. Therefore, it can execute flexible instruction combination and reduce waste of instruction fields.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.5
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• pp.298-305
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• 2003

This paper describes a 128-channel hardware simulator that is useful for verification and testing of digital circuits. It performs logic analyzer function and signal generator function at the same time. The core module, which implements one channel of the simulator, operates as a controller with independent memory and internal mode. Therefore, we can easily extend the number of channels with addition of core module. Moreover, since the simulator was implemented as a PC based system, one can construct a low-cost system and can configure convenient GUI(Graphic User Interface) environment. The simulator implemented using FPGA operates at 50Mhz and consumes 55W power as average.

• ETRI Journal
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• v.30 no.4
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• pp.576-586
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• 2008

In most parallel loops of embedded applications, every iteration executes the exact same sequence of instructions while manipulating different data. This fact motivates a new compiler-hardware orchestrated execution framework in which all parallel threads share one fetch unit and one decode unit but have their own execution, memory, and write-back units. This resource sharing enables parallel threads to execute in lockstep with minimal hardware extension and compiler support. Our proposed architecture, called multithreaded lockstep execution processor (MLEP), is a compromise between the single-instruction multiple-data (SIMD) and symmetric multithreading/chip multiprocessor (SMT/CMP) solutions. The proposed approach is more favorable than a typical SIMD execution in terms of degree of parallelism, range of applicability, and code generation, and can save more power and chip area than the SMT/CMP approach without significant performance degradation. For the architecture verification, we extend a commercial 32-bit embedded core AE32000C and synthesize it on Xilinx FPGA. Compared to the original architecture, our approach is 13.5% faster with a 2-way MLEP and 33.7% faster with a 4-way MLEP in EEMBC benchmarks which are automatically parallelized by the Intel compiler.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.340-342
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• 2003

Location based services based on positions of moving objects are expanding the business area gradually. The location is included all estimate position of the future as well as the position of the present and the past. Location based routing service is active business application in which the position information of moving objects is applied efficiently. This service includes the trajectory of past positions, the real-time tracing of present position of special moving objects, and the shortest and optimized paths combined with map information. In this paper, we describes the location based routing services is extend in distributed web GIS environment. Web GIS service systems provide the various GIS services of analyzing and displaying the spatial data with friendly user - interface. That is, we propose the efficient architecture and technologies for servicing the location based routing services in distributed web GIS environment. The position of moving objects is acquired by GPS (Global Positioning System) and converted the coordinate of real world by map matching with geometric information. We suppose the swapping method between main memory and storages to access the quite a number of moving objects. And, the result of location based routing services is wrapped the web-styled data format. We design the schema based on the GML. We design these services as components were developed in object-oriented computing environment, and provide the interoperability, language-independent, easy developing environment as well as re - usability.