• Title/Summary/Keyword: Memory Extend

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WELL-POSEDNESS AND ASYMPTOTIC BEHAVIOR OF PARTLY DISSIPATIVE REACTION DIFFUSION SYSTEMS WITH MEMORY

  • Vu Trong Luong;Nguyen Duong Toan
    • Bulletin of the Korean Mathematical Society
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    • v.61 no.1
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    • pp.161-193
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    • 2024
  • In this paper, we consider the asymptotic behavior of solutions for the partly dissipative reaction diffusion systems of the FitzHugh-Nagumo type with hereditary memory and a very large class of nonlinearities, which have no restriction on the upper growth of the nonlinearity. We first prove the existence and uniqueness of weak solutions to the initial boundary value problem for the above-mentioned model. Next, we investigate the existence of a uniform attractor of this problem, where the time-dependent forcing term h ∈ L2b(ℝ; H-1(ℝN)) is the only translation bounded instead of translation compact. Finally, we prove the regularity of the uniform attractor A, i.e., A is a bounded subset of H2(ℝN) × H1(ℝN) × L2µ(ℝ+, H2(ℝN)). The results in this paper will extend and improve some previously obtained results, which have not been studied before in the case of non-autonomous, exponential growth nonlinearity and contain memory kernels.

Design of Optimized SWAP System for Next-Generation Storage Devices (차세대 저장 장치에 최적화된 SWAP 시스템 설계)

  • Han, Hyuck
    • The Journal of the Korea Contents Association
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    • v.15 no.4
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    • pp.9-16
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    • 2015
  • On modern operating systems such as Linux, virtual memory is a general way to provide a large address space to applications by using main memory and storage devices. Recently, storage devices have been improved in terms of latency and bandwidth, and it is expected that applications with large memory show high-performance if next-generation storage devices are considered. However, due to the overhead of virtual memory subsystem, the paging system can not exploit the performance of next-generation storage devices. In this study, we propose several optimization techniques to extend memory with next-generation storage devices. The techniques are to allocate block addresses of storage devices for write-back operations as well as to configure the system parameters, and we implement the techniques on Linux 3.14.3. Our evaluation through using multiple benchmarks shows that our system has 3 times (/24%) better performance on average than the baseline system in the micro(/macro)-benchmark.

Design of a scalable general-purpose parallel associative processor using content-addressable memory (Content-Addressable Memory를 이용한 확장 가능한 범용 병렬 Associative Processor 설계)

  • Park, Tae-Geun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.2 s.344
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    • pp.51-59
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    • 2006
  • Von Neumann architecture suffers from the interface between the central processing unit and the memory, which is called 'Von Neumann bottleneck' In this paper, we propose a scalable general-purpose associative processor (AP) based on content-addressable memory (CAM) which solves this problem and is suitable for the search-oriented applications. We propose an efficient instruction set and a structural scalability to extend for larger applications. We define twelve instructions and provide some reduced instructions to speed up which execute two instructions in a single instruction cycle. The proposed AP performs in a bit-serial, word-parallel fashion and can be considered as a 32-bit general-purpose parallel processor with a massively parallel SIMD structure. We design and simulate a maximum/minumum search greater-than/less-than search, and parallel addition to verify the proposed architecture. The algorithms are executed in a constant time O(k) regardless of the number of input data.

Development of the Efficient Compressed Data Management System for Embedded DBMS (모바일 DBMS를 위한 효율적인 압축 데이터 관리 시스템의 개발)

  • Shin, Young-Jae;Hwang, Jin-Ho;Kim, Hak-Soo;Lee, Seung-Mi;Son, Jin-Hyun
    • The KIPS Transactions:PartD
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    • v.15D no.5
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    • pp.589-598
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    • 2008
  • Recently, Mobile Computing Devices are used generally. And Information which is processed by Mobile computing devices is increasing. Because information is digitalizing. So Mobile computing Devices demand an Embedded DBMS for efficient management of information. Moreover Mobile computing Devices demand an efficient storage management in NAND-type flash memory because the NAND-type flash memory is using generally in Mobile computing devices and the NAND-type flash memory is more expensive than the magnetic disks. So that in this paper, we present an efficient Compressed Data Management System for the embedded DBMS that is used in flash memory. This proposed system improve the space utilization and extend a lifetime of a flash memory because it decreases the size of data.

Effects of Saenghyetang on Learning and Memory Performances in Mice (생혜탕(生慧湯)이 흰쥐의 학습(學習)과 기억(記憶)에 미치는 영향(影響))

  • Yu Geum-Ryoung;Chang Gyu-Tae;Kim Jang-Hyeon
    • The Journal of Pediatrics of Korean Medicine
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    • v.15 no.1
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    • pp.77-104
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    • 2001
  • The effects of the oriental herbal medicine Saenghyetang(SHT, 生慧湯), which consists of Rehmanniae Radix (熟地黃 九蒸: was made by 9th steam) 40g, Corni Fructus(山茱黃) 16g, Polygalae Radix(遠志) 8g, Zizyphi Spinosae Semen(酸棗仁) 2g, Biotae Semen(柏子仁 去油: oil ingredient was removed) 20g, Poria Cocos(茯笭) 12g, Ginseng Radix(人蔘) 12g, Acori Graminei Rhizoma(石菖蒲) 2g, Sinapis Semen(白芥子) 8g, on learning ability and memory were investigated. Hot water extract(HWE) and ethanol extract(EE) from SHT were used for the studies. Learning ability and memory are related to modifications of synaptic strength among neurons that interactive. Enhanced synaptic coincidence detection leads to improved learning ability and memory. If the NMDA receptor, a synaptic coincidence detector, acts as a graded switch for memory formations, enhanced signal detection by NMDA receptors should enhance learning ability and memory. It was shown that NR2B was increased in the forebrains of oriental medicine-administrated mice, leading to enhanced activation of NMDA receptors and facilitating synaptic potentiation in response to stimulation at 10-100 Hz. These HWE-SHT treated mice exhibited that superior ability in learning and memory when performing various behavioral tasks, showing that NR2B is enhanced by HWE-SHT treatment and also is critical in gating the age-dependent threshold for plasticity and memory formation. NMDA receptor-dependent modifications, which were mediated in part by HWE administration, of synaptic efficacy, therefore, represent a mechanism for associative learning ability and memory. Results suggest that oriental medical enhancement of NR2B contributes to increase intelligence and memory in mammals On the other hand, to examine the effects of EE-SHT on the learning ability and memory in experimental mice, EE-SHT was tested on passive and active avoidance responses. The EE-SHT ameliorated the memory retrieval deficit induced by ethanol in mice, but not other memory impairments. EE-SHT(10, 20mg/100 g, p.o.) did not affect the passive avoidance responses of normal mice in the step through and step down tests, the conditioned and unconditioned avoidance responses of normal mice in the shuttle box, lever press performance tests and the ambulatory activity of normal mice in a normal condition. However, EE-SHT at 20 mg/kg significantly decrease the spontaneous motor activity during the shuttle box test, and also to extend the sleeping time induced by pentobarbital in mice. These results suggest that SHT has an ameliorating effect on memory retrieval impairments and a weak tranquilizing action.

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MODELS AND SOLUTION METHODS FOR SHORTEST PATHS IN A NETWORK WITH TIME-DEPENDENT FLOW SPEEDS

  • Sung, Ki-Seok;Bell, Michael G-H
    • Management Science and Financial Engineering
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    • v.4 no.2
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    • pp.1-13
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    • 1998
  • The Shortest Path Problem in Time-dependent Networks, where the travel time of each link depends on the time interval, is not realistic since the model and its solution violate the Non-passing Property (NPP:often referred to as FIFO) of real phenomena. Furthermore, solving the problem needs much more computational and memory complexity than the general shortest path problem. A new model for Time-dependent Networks where the flow speeds of each link depend on time interval, is suggested. The model is more realistic since its solution maintains the NPP. Solving the problem needs just a little more computational complexity, and the same memory complexity, as the general shortest path problem. A solution algorithm modified from Dijkstra's label setting algorithm is presented. We extend this model to the problem of Minimum Expected Time Path in Time-dependent Stochastic Networks where flow speeds of each link change statistically on each time interval. A solution method using the Kth-shortest Path algorithm is presented.

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Bringing 3D ICs to Aerospace: Needs for Design Tools and Methodologies

  • Lim, Sung Kyu
    • Journal of information and communication convergence engineering
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    • v.15 no.2
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    • pp.117-122
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    • 2017
  • Three-dimensional integrated circuits (3D ICs), starting with memory cubes, have entered the mainstream recently. The benefits many predicted in the past are indeed delivered, including higher memory bandwidth, smaller form factor, and lower energy. However, 3D ICs have yet to find their deployment in aerospace applications. In this paper we first present key design tools and methodologies for high performance, low power, and reliable 3D ICs that mainly target terrestrial applications. Next, we discuss research needs to extend their capabilities to ensure reliable operations under the harsh space environments. We first present a design methodology that performs fine-grained partitioning of functional modules in 3D ICs for power reduction. Next, we discuss our multi-physics reliability analysis tool that identifies thermal and mechanical reliability trouble spots in the given 3D IC layouts. Our tools will help aerospace electronics designers to improve the reliability of these 3D IC components while not degrading their energy benefits.

Design of Novel Memory Controller to Extend IPSec External Interface (IPSec Engine의 외부 인터페이스 확장을 위한 범용 메모리 컨트롤러의 설계)

  • 김철민;임용준;김영근
    • Proceedings of the IEEK Conference
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    • 2003.07a
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    • pp.489-492
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    • 2003
  • 본 논문은 기존 IPSec(internet protocol security) 하드웨어의 고정된 인터페이스 방식을 개선한 동적 인터페이스 방식의 IPSec 을 구현하기 위하여 범용 인터페이스 메모리 컨트롤러를 제안하고 있다. 범용 컨트롤러는 다양한 플랫폼 상의 외부 인터페이스와 내부 암호화 모듈 간 데이터 폭 차이를 상쇄하여 다양한 환경 하에서 구동이 가능한 하드웨어 인터페이스를 제공할 수 있을 것이다.

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Implementation of Bidirectional Associative Memories Using the GBAM Model with Bias Terms (바이어스항이 있는 GBAM 모델을 이용한 양방향 연상메모리 구현)

  • 임채환;박주영
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2001.05a
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    • pp.69-72
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    • 2001
  • In this paper, we propose a new design method for bidirectional associative memories model with high error correction ratio. We extend the conventional GBAM model using bias terms and formulate a design procedure in the form of a constrained optimization problem. The constrained optimization problem is then transformed into a GEVP(generalized eigenvalue problem), which can be efficiently solved by recently developed interior point methods. The effectiveness of the proposed approach is illustrated by a example.

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The Effect of Mesh Reordering on Laplacian Smoothing for Nonuniform Memory Access Architecture-based High Performance Computing Systems (NUMA구조를 가진 고성능 컴퓨팅 시스템에서의 메쉬 재배열의 라플라시안 스무딩에 대한 효과)

  • Kim, Jbium
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.3
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    • pp.82-88
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    • 2014
  • We study the effect of mesh reordering on Laplacian smoothing for parallel high performance computing systems. Specifically, we use the Reverse-Cuthill McKee algorithm to reorder meshes and use Laplacian Smoothing to improve the mesh quality on Nonuniform memory access architecture-based parallel high performance computing systems. First, we investigate the effect of using mesh reordering on Laplacian smoothing for a single core system and extend the idea to NUMA-based high performance computing systems.