• 한국멀티미디어학회논문지
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• 제3권4호
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• pp.407-415
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• 2000

설비 집약적이며 복잡한 생산 시스템중의 하나인 반도체 FAB 공정은 제품의 흐름시간과 대기시간, 공정 중 재고를 줄이는 것이 흐름제어의 가장 중요한 목표이다. 이에 본 연구에서는 소품종 다랑 생산 시스템에서 발생하는 비경제성을 줄이고 생산성을 향상시키기 위하여 현재 반도체 양산 회사에서 주로 채택하고 있는 In-Line Layout을 분석하고 새로운 제안 방식인 그룹테크놀로지를 이용한 Job Shop 형태의 Stand Alone Layout과 함께 각각의 모델로 구축하고 시뮬레이션 함으로써 일별 생산 계획상의 회수 변화에 따른 각Layout의 특성을 비교, 분석하였다. 이 때 사용한 시뮬레이션 툴은 모델 구축 및 시뮬레이션이 용이하고 범용적인 (이산형 제조 시스템용) ProSys를 사용하였다. 연구 결과로는 일별 생산 계획상의 회수 초기에는 In-Line Layout이 Stand Alone Layout보다 대체로 생산량 측면에서 우세하지만 일별 생산계획상의 회수가 증가된 14회부터는 Stand Alone Layout이 더 우세한 것으로 나타났다

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.108-109
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• 2012

This talk will begin with the demonstration of facile synthesis of silicon nanostructures using the magnesiothermic reduction on silica nanostructures prepared via self-assembly, which will be followed by the characterization results of their performance for energy storage. This talk will also report the fabrication and characterization of highly porous, stretchable, and conductive polymer nanocomposites embedded with carbon nanotubes (CNTs) for application in flexible lithium-ion batteries. It will be presented that the porous CNT-embedded PDMS nanocomposites are capable of good electrochemical performance with mechanical flexibility, suggesting these nanocomposites could be outstanding anode candidates for use in flexible lithium-ion batteries. Directed self-assembly (DSA) of block copolymers (BCPs) can generate uniform and periodic patterns within guiding templates, and has been one of the promising nanofabrication methodologies for resolving the resolution limit of optical lithography. BCP self-assembly processing is scalable and of low cost, and is well-suited for integration with existing semiconductor manufacturing techniques. This talk will introduce recent research results (of my research group) on the self-assembly of Si-containing block copolymers for the achievement of sub-10 nm resolution, fast pattern generation, transfer-printing capability onto nonplanar substrates, and device applications for nonvolatile memories. An extraordinarily facile nanofabrication approach that enables sub-10 nm resolutions through the synergic combination of nanotransfer printing (nTP) and DSA of block copolymers is also introduced. This simple printing method can be applied on oxides, metals, polymers, and non-planar substrates without pretreatments. This talk will also report the direct formation of ordered memristor nanostructures on metal and graphene electrodes by the self-assembly of Si-containing BCPs. This approach offers a practical pathway to fabricate high-density resistive memory devices without using high-cost lithography and pattern-transfer processes. Finally, this talk will present a novel approach that can relieve the power consumption issue of phase-change memories by incorporating a thin $SiO_x$ layer formed by BCP self-assembly, which locally blocks the contact between a heater electrode and a phase-change material and reduces the phase-change volume. The writing current decreases by 5 times (corresponding to a power reduction of 1/20) as the occupying area fraction of $SiO_x$ nanostructures varies.

• 마이크로전자및패키징학회지
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• 제30권3호
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• pp.88-93
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• 2023

고대역폭 메모리(HBM)에 대한 수요가 증가하고 직경이 더 큰 웨이퍼의 핸들링 기술이 발전함에 따라 본딩 웨이퍼의 두께 균일성에 대해 신뢰성을 확보할 수 있는 측정 방법이 요구되고 있다. 본 연구에서는 300mm 웨이퍼를 대상으로 웨이퍼의 전 영역에 대해 TTV를 측정할 수 있는 모듈을 설계 제직하고, 측정 모듈의 설계를 바탕으로 발생할 수 있는 측정 오차를 분석하였으며, 웨이퍼의 처짐과 척의 기구적 오차를 고려한 모델 해석을 통해 예측된 기울기 값에 따른 측정 오차를 추정하였다. TTV 측정 모듈은 웨이퍼 지지를 위한 센터 척과 리프트 핀을 활용하여 웨이퍼의 전체 영역에 대해 측정이 가능하도록 하였다. 모달 해석을 통해 모듈의 구조적 안정성을 예측하였으며, 구동부와 측정부 모두 100Hz 이상의 강성을 갖는 것을 확인하였다. 설계된 모듈의 측정 오차를 예측한 결과 두께 1,500um의 본딩 웨이퍼를 측정할 경우 예측된 측정 오차는 1.34nm로 나타났다.

• 대한안전경영과학회지
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• 제6권4호
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• pp.155-170
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• 2004

Among the semiconductor If-chips, unlike memory chips, a majority of Application Specific IC(ASIC) products are produced by customer orders, and meeting the customer specified due date is a critical issue for the case. However, to the one who understands the nature of semiconductor manufacturing, it does not take much effort to realize the difficulty of meeting the given specific production due dates. Due to its multi-layered feature of products, to be completed, a semiconductor product(called device) enters into the fabrication manufacturing process(FAB) repeatedly as many times as the number of the product specified layers, and fabrication processes of individual layers are composed with similar but not identical unit processes. The unit process called photo-lithography is the only process where every layer must pass through. This re-entrant feature of FAB makes predicting and planning of due date of an ordered batch of devices difficult. Parallel machines problem in the photo process, which is bottleneck process, is solved with restricted roll out algorithm. Roll out algorithm is a method of solving the problem by embedding it within a dynamic programming framework. Restricted roll out algorithm Is roll out algorithm that restricted alternative states to decrease the solving time and improve the result. Results of simulation test in condition as same as real FAB facilities show the effectiveness of the developed algorithm.

• 한국공작기계학회논문집
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• 제10권4호
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• pp.97-103
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• 2001

The study on the high-speed machine tool is very important for the improvement of productivity since it can shortens cutting and non-cutting time. Especially, high speed of feed drive system is the major research field. In the industries of the advanced countries, the feed drive systems at the speed of 60 m/min have been already developed based on the high lead ball screws. In this study, a high speed feed drive system at the speed of 60 m/ min has been developed, and its movements characteris-tics are investigated. As the movement characteristics, positioning accuracy, angular accuracy, straightness and micro step-response are measured. Thermal characteristics of the system is also discussed. For measuring the movement characteris-tics, a laser interferometer, a memory-based Hi-coder and a cooling device are used. The experimental results confirm that the movement characteristics and the thermal behavior of the system are satisfactory in the aspect of accuracy and stability.

• E2M - 전기 전자와 첨단 소재
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• 제11권11호
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• pp.46-52
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• 1998

Barium titanate owes its great importance to the fact that its dielectric constant is about 100 times higher than that of conventional dielectric materials provided its compositional and structural purity is extremely high. The value of crystalline BaTiO3 bodies as used, for instance, in computer elements, magnetic amplifiers, memory device, ets., depend on boththe compositional and the structural purity of the BaTiO3 crystals. This purity will, in turn, depend on the purity of the raw materials used in manufacturing the BaTiO3 compound and on the particularmethods of manufacture which determine the size, homogeneity, and the structural purity of the crystals. This paper reviews the important theoretical considerations, processing techniques and applications related to sol-gel derived thin films.

• 반도체디스플레이기술학회지
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• 제22권3호
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• pp.1-7
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• 2023

Recently, in the semiconductor industry, memory device market is focusing on producing ultra-thin wafers for high integration. In the wafer manufacturing process, wafers after backgrinding and CMP process must be picked up as individual dies and subjected to be peeled off from the dicing tape. However, ultra-thin dies are vulnerable to the possibility of breakage and failure in their thickness and size. This research studies the mechanism of peeling a die with a high-aspect ratio using a thermopneumatic method instead of a die ejector with physical pins. Setting compressed air and the temperature as main factors, we determine the success of the digester using thermopneumatic system and analyze the good die to find the possibility of making mass-production equipment.

• 대한전자공학회논문지SD
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• 제43권7호
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• pp.38-49
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• 2006

본 논문에서는 SoC를 검증 및 테스트하기 위한 새로운 개념의 칩을 제안하고 이를 SwToC(System with Test on a Chip)라 명명한다. SwToC는 SoC의 임베디드 프로세서에 재구성 가능한 로직을 추가하여 칩의 물리적인 결함을 테스트할 수 있을 뿐만 아니라 기존의 기법으로는 수행이 어려웠던 테스트 단계에서의 디자인 검증이 가능하도록 한 칩을 말한다. 제안한 개념의 칩은 고속 검증이 가능하며 테스트를 위해 많은 비용이 소모되는 ATE 가 불필요한 장점을 갖고 있다. 제안한 칩의 디자인 검증 및 테스트 기능을 평가하기 위하여 임베디드 프로세서가 내장된 상용 FPGA를 이용하여 SwToC를 구현하였으며, 구현 결과 제안한 칩의 실현 가능성을 확인하였고 적은 비용의 단말기를 통한 테스트가 가능함은 물론 기존의 검증기법에 비해 고속 검증이 가능함을 확인하였다.

• 한국정보통신학회논문지
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• 제6권5호
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• pp.689-695
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• 2002

막질의 조성은 공정 개발과 고품질 생산 적용을 위한 반도체 소자의 제조에 있어서 풍요한 요소의 하나 이다. 막의 표면과 계면의 조성은 기본적으로 AES측 통하여 알 수 있다. 본 연구에서는 온도, DCS post flow, shower head life time 등과 같은 공정조건으로 LPCVD법을 이용한 tungsten suicide 박막을 증착하고 이들의 구조적, 전기적 특성과 조성비를 측정하며 WSix박막을 해석하였고 이로부터 Si/W의 조성비를 비교하였다. Si와 W의 조성비는 DCS post flow에 의하여 WSix박막의 표면에서 증가하였으며, 폴리실리콘과 tungsten silicide 계면에서는 온도의 증가에 따라 조성비가 증가함을 알 수 있었다. 이 결과는 메모리 소자 제조의 WSix 박막 증착의 공정조건 최적화에 적용될 수 있다.

• 한국분말야금학회:학술대회논문집
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• 한국분말야금학회 1998년도 춘계학술대회 및 발표대회 강연 및 발표논문 초록집
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• pp.6-6
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• 1998

In 1957, the first magnetic disk drive compatible with a movable head was introduced as an external file memory device for computer system. Since then, magnetic disks have been improved by increasing the recording density, which has brought about the development of a high performance thin film magnetic head. The thin film magnetic head has a magnetic circuit on a ceramic substrate using IC technology. The physical property of the substrate material is very important because it influences the tribology of head/disk interface and also manufacturing process of the head. $Al_{2}O_{3}$-TiC ceramics, so called ALTIC, is known to be one of the best substrate materials which satisfies this property requirement. Even though the head is not in direct contact with the disk, frequent instantaneous contacts are unavoidable due to its high rotating speed and the close gap between them. This may cause damage in the magnetic recording media and, thus, it is very important that the magnetic head has a good wear resistance. $Al_{2}O_{3}$-TiC ceramics has an excellent tribological property in head/disk interface. Manufacturing process of thin film head is similar to that of IC, which requires extremely smooth and flat surface of the substrate. The substrate must be readily sliced into the heads without chipping. $Al_{2}O_{3}$-TiC ceramics has excellent machineability and mechanical properties. $Al_{2}O_{3}$-TiC ceramics was first developed at Nippon Tungsten Co. as cutting tool materials in 1968, which was further developed to be used as the substrate materials for thin film head in collaboration with Sumitomo Special Metals Co., Ltd. in 1981. Today, we supply more than 60% of the substrates for thin film head market in the world. In this paper, we would like to present the sintering process of $Al_{2}O_{3}$-TiC ceramics and its property in detail.