• Title/Summary/Keyword: Memories

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A Design of BICS Circuit for IDDQ Testing of Memories (메모리의 IDDQ 테스트를 위한 내장전류감지 회로의 설계)

  • 문홍진;배성환
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.3
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    • pp.43-48
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    • 1999

  • IDDQ testing is one of current testing methodologies which increases circuit's reliability by means of finding defects which can't be detected by functional testing in CMOS circuits. In this paper, we design a Built-In Current Sensor(BICS) circuit, which can be embedded in chip under test, that performs IDDQ testing. Furthermore, it is designed for IDDQ testing of memories and implemented to carry out testing at high-speed by using small number of transistors.

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Dynamic Testing for Word - Oriented Memories (워드지향 메모리에 대한 동적 테스팅)

  • Young Sung H.
    • Journal of the Korea Computer Industry Society
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    • v.6 no.2
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    • pp.295-304
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    • 2005

  • This paper presents the problem of exhaustive test generation for detection of coupling faults between cells in word-oriented memories. According to this fault model, contents of any w-bit memory word in a memory with n words, or ability tochange this contents, is influenced by the contents of any other s-1 words in the memory. A near optimal iterative method for construction of test patterns is proposed The systematic structure of the proposed test results in simple BIST implementations.

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