• Journal of Surface Science and Engineering
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• v.32 no.1
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• pp.61-66
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• 1999

The Spin-dependent tunneling magnetoresistance (TMR) effect was observed in $NiFe/Al_2O_3$/Co thin films. The samples were prepared by magnetron sputtering in a system with a base pressure of $3\times10^{-6}$Torr. the insulating $Al_2O_3$layer was prepared by r.f. plasma oxydation method of a metallic Al layer. The ferromagnetic and insulating layers were deposited through metallic masks to produce the cross pattern form. The junction has an active area of $0.3\times0.3\textrm{mm}^2$ and the $Al_2O_3$layer is deposited through a circular mask with a diameter of 1mm. It is very important that insulating layer is formed very thinly and uniformly in tunneling junction. The ferromagnetic layer was fabricated in optimum conditions and the surface of that was very flat, which was observed by AFM. Tunneling junction was confirmed through nonlinear I-V curve. $NiFe/Al_2O_3$/Co junction was observed for magnetization behavior and magnetoresistance property and magnetoresistance property is dependent on magnetization behavior and magnetoresistance property and magnetoresistance property is dependent on magnetization behavior of t재 ferromagnetic layer. The maximum magnetoresistance ratio was about 6.5%.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.1
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• pp.200-205
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• 1995

The 1st and 2nd-order grating structure for long wavelength DFB(Distributed FeedBack) laser diodes are successfully fabricated on InP substrates by using electron beam lithography and reactive ion etch techniques, and also characterized non-destructively by diffraction analysis without removal of photo-resis layer. A new composite layer made by lifted-off Cr layer on thin SiO2 film is developed and used as an etch mask, because PMMA, the e-beamresist, is unsuitable for reactive ion etch of InP. In addition, it is experimentally confiremed that diffraction analysis makes it possible to predict the grating parameters, and the analysis can be used as a non-destructive on-line test to prevent incomplete gratings from being successively processed.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.1
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• pp.47-52
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• 2004

3D microstructures with different side-wall angles and different scales are fabricated by both methods of inclined exposure and rear-side exposure at each of selected areas on a same substrate. Conventional methods of inclined exposure are used to make side-walls with a same inclined angle on one substrate and to get a scale error due to front-side exposure through thick photoresist layer, But, by using the proposed method, we are able to fabricate 3D microstructures on a same substrate with various side-wall angles and accurate dimensions as the original design. In the rear-side exposure, UV exposure light reflects from the chromium mask pattern after passing through the thick photoresist layer, resulting in fabrication of well-defined, inclined 3D structures inside the thick photoresist layer.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.18 no.2
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• pp.38-43
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• 2019

Electrochemical etching is a popular process to apply metal patterning in various industries. In this study, the electrochemical etching using a patterned copper layer was proposed to fabricate multilayered structures. The process consists of electrodeposition, laser patterning, and electrochemical etching, and a repetition of this process enables the production of multilayered structures. In the fabrication of a multilayered structure, an etch factor that reflects the etched depth and pattern size should be considered. Hence, the etch factor in the electrochemical etching process using the copper layer was calculated. After the repetition process of electrochemical etching using copper layers, the surface characteristics of the workpiece were analyzed by EDS analysis and surface profilometer. As a result, multilayered structures with various shapes were successfully fabricated via electrochemical etching using copper layers.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.642-642
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• 2013

Graphene, two dimensional single layer of carbon atoms, has tremendous attention due to its superior property such as high electron mobility, high thermal conductivity and optical transparency. Especially, chemical vapor deposition (CVD) grown graphene has been used as a promising material for high quality and large-scale graphene film. Unfortunately, although CVD-grown graphene has strong advantages, application of the CVD-grown graphene is limited due to ineffective transfer process that delivers the graphene onto a desired substrate by using polymer support layer such as PMMA(polymethyl methacrylate). The transferred CVD-grown graphene has serious drawback due to remaining polymeric residues generated during transfer process, which induces the poor physical and electrical characteristics by a p-doping effect and impurity scattering. To solve such issue incurred during polymer transfer process of CVD-grown graphene, various approaches including thermal annealing, chemical cleaning, mechanical cleaning have been tried but were not successful in getting rid of polymeric residues. On the other hand, lithographical patterning of graphene is an essential step in any form of microelectronic processing and most of conventional lithographic techniques employ photoresist for the definition of graphene patterns on substrates. But, application of photoresist is undesirable because of the presence of residual polymers that contaminate the graphene surface consistent with the effects generated during transfer process. Therefore, in order to fully utilize the excellent properties of CVD-grown graphene, new approach of transfer and patterning techniques which can avoid polymeric residue problem needs to be developed. In this work, we carried out transfer and patterning process simultaneously with no polymeric residue by using a metal etch mask. The patterned thin gold layer was deposited on CVD-grown graphene instead of photoresists in order to make much cleaner and smoother surface and then transferred onto a desired substrate with PMMA, which does not directly contact with graphene surface. We compare the surface properties and patterning morphology of graphene by scanning electron microscopy (SEM), atomic force microscopy(AFM) and Raman spectroscopy. Comparison with the effect of residual polymer and metal on performance of graphene FET will be discussed.

• Journal of Broadcast Engineering
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• v.25 no.6
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• pp.944-953
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• 2020

Object detection plays a crucial role in a self-driving system. With the advances of image recognition based on deep convolutional neural networks, researches on object detection have been actively explored. In this paper, we proposed a lightweight model of the mask R-CNN, which has been most widely used for object detection, to efficiently predict location and shape of various objects on the road environment. Furthermore, feature maps are adaptively re-calibrated to improve the detection performance by applying an attention module to the neural network layer that plays different roles within the mask R-CNN. Various experimental results for real driving scenes demonstrate that the proposed method is able to maintain the high detection performance with significantly reduced network parameters.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1115-1117
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• 2005

This paper describes the three dimension model and simulation results of a thermal actuator based on polyMUMPs process, known as thermal multimorph actuator. The device has potential application in micro-transducers such as atomic force microscope (AFM) tip and scanning tunneling microscope (STM) tip. This device made of a multi-layer materials stack together with consisted of polysilicon, $SiO_2$ and gold. A mask layout design, three dimension model and simulation results are reported and discussed.

• Journal of Information Display
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• v.8 no.1
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• pp.1-5
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• 2007

We have developed a CMOS LTPS process which requires only five photolithographic masks and only one ion doping step. Drain/Source areas of NMOS TFTs were formed by PECVD deposition of a highly doped precursor layer while PMOS contact areas were defined by ion implantation. Single TFTs, inverters, ring oscillators and shift registers were fabricated. N and p-channel devices reached field effect mobilities of $173cm^2$/Vs and $47cm^2$/Vs, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.380-380
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• 2013

본 논문에서는 외기 환경 요인 중에서 H2O와 O2의 영향으로 성능이 저하되는 유기박막트랜지스터(OTFT)의 수명시간 향상을 위하여 필요한 passivation layer의 효과에 대하여 알아 보았다. OTFT에 기존의 액상 공정이나 증착 공정으로 단일 passivation layer또는 다층 passivation layer를 형성하는 방식과는 다르게 향후에 산업 전반에 적용이 기대되는 것을 고려하여 제작 공정의 간편성을 위하여 film 형태로 되어 있는 열경화성 epoxy resin film으로 passivation layer를 구현하는 방법을 사용하여 OTFT의 storage stability를 평가하였다. passivation layer가 없는 OTFT와 열경화성 epoxy resin film으로 passivation된 OTFT의 전기적 특성이 서로 비교 평가되었으며 또한 30일 동안 온도 $25^{\circ}C$ 상대습도 40%의 환경을 갖는 Desicator 안에서 소자를 보관하여 시간에 따른 전기적 특성 변화를 검증하여 epoxy resin film의 passivation layer으로의 적용가능성을 검증하였다. 결과적으로 30일 후의 passivation layer가 없는 OTFT의 전기적 특성은 매우 낮게 떨어진 반면에 epoxy resin film으로 passivation layer가 구현된 OTFT의 mobility는 $0.060cm^2$/Vs, VT는 -0.18 V, on/off ratio는 $3.7{\times}10^3$으로 초기의 소자 특성이 잘 유지되는 결과를 얻었다. OTFT는 Flexible한 polyethersulfone (PES)기판에 게이트 전극이 하부에 있는 Bottom gate 구조로 제작되었고 채널 형성을 위한 유기반도체 재료로 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene이 사용되었고 spin coating된 Poly-4-vinylphenol (PVP)가 게이트 절연체로 사용되었다. 이때 Au전극은 Shadow mask를 이용하여 증착하였다. 또한 OTFT의 채널 길이 $100{\mu}m$, 채널 폭 $300{\mu}m$의 영역에 Drop casting법을 사용하여 채널을 형성하였다. 물리적 특성은 scanning electron microscopy (SEM), scanning probe microscopy (SPM), x-ray diffraction (XRD)를 사용하여 분석하였고, 전기적 특성은 Keithley-4200을 사용하여 추출하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1466-1469
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• 2008

We have fabricated 2.5 inch QQCIF AM-OLED panel driven by ZnO-TFT on a plastic substrate for the first time. The number of photo mask for the whole panel process was 5 and the TFT structure was top gate with active protection layer as a first gate insulator. Optimizing the process for the substrate buffer layer, active layer, ZnO protection layer, and gate insulator was key factor to achieve the TFT performance enough to drive OLED. The ZnO TFT has mobility of $5.4\;cm^2/V.s$, turn on voltage of -6.8 V, sub-threshold swing of 0.39 V/decade, and on/off ratio of $1.7{\times}10^9$. Although whole process temperature is below $150^{\circ}C$ to be suitable for the plastic substrate, performance of ZnO TFT was comparable to that fabricated at higher temperature on the glass.