• Title/Summary/Keyword: Machine-to-machine communications

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Efficient Virtual Machine Migration for Mobile Cloud Using PMIPv6 (모바일 클라우드 환경에서 PMIPv6를 이용한 효율적인 가상머신 마이그레이션)

  • Lee, Tae-Hee;Na, Sang-Ho;Lee, Seung-Jin;Kim, Myeong-Eeob;Huh, Eui-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37B no.9
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    • pp.806-813
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    • 2012
  • In a cloud computing environment, various solutions were introduced to provide the service to users such as Infrastructure as a Service (IaaS), Platform as a Service (PaaS), Software as a Service (SaaS) and Desktop as a Service (DaaS). Nowadays, Mobile as a Service (MaaS) to provide the mobility in a cloud environment. In other words, users must have access to data and applications even when they are moving. Thus, to support the mobility to a mobile Thin-Client is the key factor. Related works to support the mobility for mobile devices were Mobile IPv6 and Proxy Mobile IPv6 which showed performance drawbacks such as packet loss during hand-over which could be very critical when collaborating with cloud computing environment. The proposed model in this paper deploys middleware and replica servers to support the data transmission among cloud and PMIPv6 domain. It supports efficient mobility during high-speed movement as well as high-density of mobile nodes in local mobility anchor. In this paper, through performance evaluation, the proposed scheme shows the cost comparison between previous PMIPv6 and verifies its significant efficiency.

A Study on Automatic Generation of Interface Circuits Based on FSM between Standard Buses and Ips (FSM을 이용한 표준화된 버스와 IP간의 인터페이스 회로 자동생성에 관한 연구)

  • Lee, Ser-Hoon;Moon, Jong-Uk;Hwang, Sun-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.2A
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    • pp.137-146
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    • 2005
  • IP-based design methodology has been popularly employed for SoC design to reduce design complexity and to cope with time-to-market pressure. Interface modules for communication between system buses and IPs are required, since many IPs employ different protocols. Automatic generation of these interface modules would enhance designer's productivity and IP's reusability. This paper proposes an automatic interface generation system based on FSM generated from the protocol description of IPs. The proposed system provides the library modules for the standard buses to reduce the burdens of describing the protocols for data transfer from/to standard buses. Experimental results show that the area of the interface circuits generated by the proposed system had been increased slightly by 4.5% on the average when compared to manual designs. In the experiment, where bus clock is 100 Mhz and slave module clock is 34 Mhz, the latency of the interface had been increased by 7.1% in burst mode to transfer 16 data words. However, occupation of system bus can be reduce by 64.9%. A chip designer can generate an interface that improves the efficiency of system bus, by using this system.

Hardware-Based High Performance XML Parsing Technique Using an FPGA (FPGA를 이용한 하드웨어 기반 고성능 XML 파싱 기법)

  • Lee, Kyu-hee;Seo, Byeong-seok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.12
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    • pp.2469-2475
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    • 2015
  • A structured XML has been widely used to present services on various Web-services. The XML is also used for digital documents and digital signatures and for the representation of multimedia files in email systems. The XML document should be firstly parsed to access elements in the XML. The parsing is the most compute-instensive task in the use of XML documents. Most of the previous work has focused on hardware based XML parsers in order to improve parsing performance, while a little work has studied parsing techniques. We present the high performance parsing technique which can be used all of XML parsers and design hardware based XML parser using an FPGA. The proposed parsing technique uses element analyzers instead of the state machine and performs multibyte-based element matching. As a result, our parsing technique can reduce the number of clock cycles per byte(CPB) and does not need to require any preprocessing, such as loading XML data into memory. Compared to other parsers, our parser acheives 1.33~1.82 times improvement in the system performance. Therefore, the proposed parsing technique can process XML documents in real time and is suitable for applying to all of XML parsers.

Automatic TV Program Recommendation using LDA based Latent Topic Inference (LDA 기반 은닉 토픽 추론을 이용한 TV 프로그램 자동 추천)

  • Kim, Eun-Hui;Pyo, Shin-Jee;Kim, Mun-Churl
    • Journal of Broadcast Engineering
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    • v.17 no.2
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    • pp.270-283
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    • 2012
  • With the advent of multi-channel TV, IPTV and smart TV services, excessive amounts of TV program contents become available at users' sides, which makes it very difficult for TV viewers to easily find and consume their preferred TV programs. Therefore, the service of automatic TV recommendation is an important issue for TV users for future intelligent TV services, which allows to improve access to their preferred TV contents. In this paper, we present a recommendation model based on statistical machine learning using a collaborative filtering concept by taking in account both public and personal preferences on TV program contents. For this, users' preference on TV programs is modeled as a latent topic variable using LDA (Latent Dirichlet Allocation) which is recently applied in various application domains. To apply LDA for TV recommendation appropriately, TV viewers's interested topics is regarded as latent topics in LDA, and asymmetric Dirichlet distribution is applied on the LDA which can reveal the diversity of the TV viewers' interests on topics based on the analysis of the real TV usage history data. The experimental results show that the proposed LDA based TV recommendation method yields average 66.5% with top 5 ranked TV programs in weekly recommendation, average 77.9% precision in bimonthly recommendation with top 5 ranked TV programs for the TV usage history data of similar taste user groups.

Topic Sensitive_Social Relation Rank Algorithm for Efficient Social Search (효율적인 소셜 검색을 위한 토픽기반 소셜 관계 랭크 알고리즘)

  • Kim, Young-An;Park, Gun-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.5
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    • pp.385-393
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    • 2013
  • In the past decade, a paradigm shift from machine-centered to human-centered and from technology-driven to user-driven has been witnessed. Consequently, Social search is getting more social and Social Network Service (SNS) is a popular Web service to connect and/or find friends, and the tendency of users interests often affects his/her who have similar interests. If we can track users' preferences in certain boundaries in terms of Web search and/or knowledge sharing, we can find more relevant information for users. In this paper, we propose a novel Topic Sensitive_Social Relationship Rank (TS_SRR) algorithm. We propose enhanced Web searching idea by finding similar and credible users in a Social Network incorporating social information in Web search. The Social Relation Rank between users are Social Relation Value, that is, for a different topics, a different subset of the above attributes is used to measure the Social Relation Rank. We observe that a user has a certain common interest with his/her credible friends in a Social Network, then focus on the problem of identifying users who have similar interests and high credibility, and sharing their search experiences. Thus, the proposed algorithm can make social search improve one step forward.

Implementation and Performance Measuring of Erasure Coding of Distributed File System (분산 파일시스템의 소거 코딩 구현 및 성능 비교)

  • Kim, Cheiyol;Kim, Youngchul;Kim, Dongoh;Kim, Hongyeon;Kim, Youngkyun;Seo, Daewha
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.11
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    • pp.1515-1527
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    • 2016
  • With the growth of big data, machine learning, and cloud computing, the importance of storage that can store large amounts of unstructured data is growing recently. So the commodity hardware based distributed file systems such as MAHA-FS, GlusterFS, and Ceph file system have received a lot of attention because of their scale-out and low-cost property. For the data fault tolerance, most of these file systems uses replication in the beginning. But as storage size is growing to tens or hundreds of petabytes, the low space efficiency of the replication has been considered as a problem. This paper applied erasure coding data fault tolerance policy to MAHA-FS for high space efficiency and introduces VDelta technique to solve data consistency problem. In this paper, we compares the performance of two file systems, MAHA-FS and GlusterFS. They have different IO processing architecture, the former is server centric and the latter is client centric architecture. We found the erasure coding performance of MAHA-FS is better than GlusterFS.

Low-Gate-Count 32-Bit 2/3-Stage Pipelined Processor Design (소면적 32-bit 2/3단 파이프라인 프로세서 설계)

  • Lee, Kwang-Min;Park, Sungkyung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.4
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    • pp.59-67
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    • 2016
  • With the enhancement of built-in communication capabilities in various meters and wearable devices, which implies Internet of things (IoT), the demand of small-area embedded processors has increased. In this paper, we introduce a small-area 32-bit pipelined processor, Juno, which is available in the field of IoT. Juno is an EISC (Extendable Instruction Set Computer) machine and has a 2/3-stage pipeline structure to reduce the data dependency of the pipeline. It has a simple pipeline controller which only controls the program counter (PC) and two pipeline registers. It offers $32{\times}32=64$ multiplication, 64/32=32 division, $32{\times}32+64=64$ MAC (multiply and accumulate) operations together with 32*32=64 Galois field multiplication operation for encryption processing in wireless communications. It provides selective inclusion of these algebraic logic blocks if necessary in order to reduce the area of the overall processor. In this case, the gate count of our integer core amounts to 12k~22k and has a performance of 0.57 DMIPS/MHz and 1.024 Coremark/MHz.

Design and Implementation of OBCP Engine based on Lua VM for AT697F/VxWorks Platform (AT697F/VxWorks 플랫폼에서 Lua 가상머신 기반의 OBCP 엔진 설계 및 구현)

  • Choi, Jong-Wook;Park, Su-Hyun
    • Journal of Satellite, Information and Communications
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    • v.12 no.3
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    • pp.108-113
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    • 2017
  • The OBCP called 'operator on board' is that of a procedure to be executed on-board, which can be easily be loaded, executed, and also replaced, without modifying the remainder of the FSW. The use of OBCP enhances the on-board autonomy capabilities and increases the robustness to ground stations outages. The OBCP engine which is the core module of OBCP component in the FSW interprets and executes of the procedures based on script language written using a high-level language, possibly compiled, and it is relying on a virtual machine of the OBCP engine. FSW team in KARI has studied OBCP since 2010 as FSW team's internal projects, and made some OBCP engines such as Java KVM, RTCS/C and KKOMA on ERC32 processor target only for study. Recently we have been studying ESA's OBCP standard and implementing Lua and MicroPython on LEON2-FT/AT697F processor target as the OBCP engine. This paper presents the design and implementation of Lua for the OBCP engine on AT697F processor with VxWorks RTOS, and describes the evaluation result and performance of the OBCP engine.

Development of Greenhouse Environment Monitoring & Control System Based on Web and Smart Phone (웹과 스마트폰 기반의 온실 환경 제어 시스템 개발)

  • Kim, D.E.;Lee, W.Y.;Kang, D.H.;Kang, I.C.;Hong, S.J.;Woo, Y.H.
    • Journal of Practical Agriculture & Fisheries Research
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    • v.18 no.1
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    • pp.101-112
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    • 2016
  • Monitoring and control of the greenhouse environment play a decisive role in greenhouse crop production processes. The network system for greenhouse control was developed by using recent technologies of networking and wireless communications. In this paper, a remote monitoring and control system for greenhouse using a smartphone and a computer with internet has been developed. The system provides real-time remote greenhouse integrated management service which collects greenhouse environment information and controls greenhouse facilities based on sensors and equipments network. Graphical user interface for an integrated management system was designed with bases on the HMI and the experimental results showed that a sensor data and device status were collected by integrated management in real-time. Because the sensor data and device status can be displayed on a web page, transmitted using the server program to remote computer and mobile smartphone at the same time. The monitored-data can be downloaded, analyzed and saved from server program in real-time via mobile phone or internet at a remote place. Performance test results of the greenhouse control system has confirmed that all work successfully in accordance with the operating conditions. And data collections and display conditions, event actions, crops and equipments monitoring showed reliable results.

A development of DS/CDMA MODEM architecture and its implementation (DS/CDMA 모뎀 구조와 ASIC Chip Set 개발)

  • 김제우;박종현;김석중;심복태;이홍직
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.6
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    • pp.1210-1230
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    • 1997
  • In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.

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