• Journal of the Korean Institute of Intelligent Systems
• /
• v.11 no.8
• /
• pp.701-708
• /
• 2001

Recently, the research on intelligence of computer has actively been under way in various areas and gradually extended to adapt to uncertain and complex environments. In this paper, we propose the MVL-Neural Valued Logic. Also, we verify that the MVL-Automata can be implemented to Neural Network and the MVL-Neural Network Model can be a simulator by MVL-Automata. Therefore, we propose that the MVL-Neural Network Model can be widely used in such area, as intelligent system or modeling of brain. In particular, the MVL-Neural Network is expected to be used as core technology of next generation computer.

• Journal of Semiconductor Engineering
• /
• v.1 no.1
• /
• pp.57-63
• /
• 2020

Complementary metal-oxide-semiconductor (CMOS) technology is now facing a power scaling limit to increase integration density. Since 1970s, multi-valued logic (MVL) has been considered as promising alternative to resolve power scaling challenge for increasing information density up to peta-scale level by reducing the system complexity. Over the past several decades, however, a power-scalable and mass-producible MVL technology has been absent so that MVL circuit and system implementation have been delayed. Recently, compact MVL device researches incorporating multiple-switching characteristics in a single device such as 2D heterojunction-based negative-differential resistance (NDR)/transconductance (NDT) devices and quantum-dot/superlattices-based constant intermediate current have been actively performed. Meanwhile, wafer-scale, energy-efficient and variation-tolerant ternary-CMOS (T-CMOS) technology has been demonstrated through commercial foundry. In this review paper, an overview for MVL development history including recent studies will be presented. Then, the status and its future research direction of MVL technology will be discussed focusing on the T-CMOS technology for peta-scale information processing in semiconductor chip.

• Journal of the Korean Institute of Telematics and Electronics T
• /
• v.36T no.1
• /
• pp.32-40
• /
• 1999

The analysis of logic function is performed by the spectral coefficients which transform the function domain data into the spectral domain data. By using the spectral techniques, analysis of MVL circuits is performaed, and the fault analysis and detecting methods of multiple-valued logic circuits are proposed in this paper.

• Proceedings of the Korean Institute of Intelligent Systems Conference
• /
• 2001.12a
• /
• pp.213-216
• /
• 2001

기존의 유한오토마타는 입력 값에 따른 상태 전이가 유한개의 문자열이 입력될 때는 정확하게 인식하나 무한개의 문자열이 입력될 때는 정확하게 인식하지 못한다는 문제점을 가지고 있다. 본 논문에서는 유한오토마타의 상태 전이를 다치오토마타 모델을 이용하여 무한개의 상태로 확장할 수 있는 가능성을 제시하고 이를 신경망 (Neural Network)으로 구현한 다치-신경망 시스템을 제안한다.

• Proceedings of the KAIS Fall Conference
• /
• 2002.05a
• /
• pp.215-217
• /
• 2002

본 논문에서는 CM-MVL(Current Mode Multi-Valued Logic)을 이용한 Host와 LCD Controller 간에 인터페이스 회로를 제안한다. 제안한 회로는 기존의 LVDS(Low Voltage Differential Signaling)과 TMDS(Transition Minimized Differential Signaling)와 같은 전류 특성을 가지며, 3비트 동시 전송이 가능하여 동일한 전송 속도 하에서 보다 많은 데이터를 전송할 수 있다. 그리고 전류에 의한 데이터 전송을 통하여 노이즈에 강한 특성을 나타낸다. 제안한 회로는 HSPICE 시뮬레이션을 통해서 회로의 동작을 확인하였다.

• Proceedings of the Korean Institute of Intelligent Systems Conference
• /
• 2002.12a
• /
• pp.502-505
• /
• 2002

본 논문은 다치(MVL:Multiple Valued Logic) 신경망의 BP(Backpropagation) 학습 알고리즘을 이용하여 패턴 인식에 이용하는 방법을 제안한다. MVL 신경망을 이용하여 패턴 인식에 이용함으로서, 네트워크에 필요한 시간 및 기억 공간을 최소화할 수 있고 환경 변화에 적응할 수 있는 가능성을 제시하였다. MVL 신경망은 다치 논리 함수를 기반으로 신경망을 구성하였으며, 입력은 리터럴 함수로 변환시키고, 출력은 MIN과 MAX 연산을 사용하여 구하였고, 학습을 하기 위해 다치 논리식의 편 미분을 사용하였다.

• Proceedings of the Korean Institute of Intelligent Systems Conference
• /
• 2002.12a
• /
• pp.497-501
• /
• 2002

개인의 경험을 통해 얻어지는 외부의 물리적 자극에 대한 복합적인 감성을 측정.분석하여 공학적으로 처리함으로서 인간이 보다 편리하고 안락한 생활을 영위하도록 하는 연구가 진행되고 있다. 본 논문에서는 인간의 오감 즉 시각, 청각, 후각, 미각, 촉각 중 소비자의 구매 욕구에 많은 영향을 주는 시각(색)에 따른 감성상태의 패턴을 분류하기 위해 색채 심리를 다치오토마타 모델을 이용하여 입력 이벤트와 상태 사이의 관계를 활용하여 감성을 처리할 수 있는 방법을 제안한다. 인간의 심리 상태를 학습할 수 있도록 오토마타의 입력 값(색)에 따른 상태(감성상태)의 변화를 신경망 모델로 구현함으로서 색채에 대한 감성을 처리하였다.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.29B no.11
• /
• pp.56-64
• /
• 1992

The sum-of-product type MVL (Multiple-valued logic) functions can be directly transformed into the exclusive-sum-of-literal-product(ESOLP) type MVL functions with a substitution of the OR operator with the exclusive-OR(XOR) operator. This paper presents an algorithm that can reduce the number of minterms for the purpose of minimizing the hardware size and the complexity of the circuit in the realization of ESOLP-type MVL functions. In Boolean algebra, the joinable true minterms can form the cube, and if some cubes form a cube-chain with adjacent cubes by the insertion of false cubes(or, false minterms), then the created cube-chain can become a large cube which includes previous cubes. As a result of the cube grouping, the number of minterms can be reduced artificially. Since ESOLP-type MVL functions take the MIN/XOR structure, a XOR circuit and a four-valued MIN/XOR dynamic-CMOS PLA circuit is designed for the realization of the minimized functions, and PSPICE simulation results have been also presented for the validation of the proposed algorithm.

• Journal of the Korean Institute of Intelligent Systems
• /
• v.11 no.4
• /
• pp.311-314
• /
• 2001

Recently, research on Intelligent Information Process has actively been under way JD various areas and gradually extended to be adaptive to uncertain and complex dynamic environments. This paper presents a Multiple Valued Logic Automata(MVL-Automata) Model, utilizing properties of difference in a Multiple Valued Logic function. That is, MVL-Automata is able to be autonomously adapted to dynamic changing since an input stling is mapped to the value of a Multiple Valued Logic function and the property of difference in a Multiple Valued Logic function is applied to state transition. Therefore, Multiple Valued Logic Automata can be widely applied to the modeling dynamically of changing environments.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.26 no.11
• /
• pp.1839-1849
• /
• 1989

An optimal variable assignment algorithm is presented as a decomposition method of MVL functions. A given 3-valued combinational logic function is disintegrated into subfunction composed of the function dependant relation, then extracted implicant output elements from subfunctions are assigned to a T-gates. As a circuit implementation tool, a programmable integarated T-gate module is proposed, and the construction procedure of combinational MVL functions is systematized in each step. This method is expected to give properties of the systematic procedure, possibility of T-gate number reduction, unification of module, and flexibility of module composition. Specially variable decomposition method can be pointed out as an approach to solving the limitation problem of the input and output terminal number in VLSI implementations.