• The korean journal of orthodontics
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• v.53 no.4
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• pp.219-231
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• 2023

Objective: This study aimed to clarify differences in the positions of cone-beam computed tomography (CBCT) landmarks according to different midsagittal planes (MSPs) in patients with skeletal Class III facial asymmetry. Methods: Pre-treatment CBCT data from 60 patients with skeletal Class III were used. The patients were classified into symmetric (menton deviations of < 2 mm) or asymmetric (menton deviations of > 4 mm) groups. Six MSPs were established based on previous studies, and three-dimensional analyses were performed for the planes in both the groups. The measurement outcomes were compared statistically. Results: A statistically significant interaction (p < 0.01) was observed between MSPs and facial asymmetry. No significant differences were observed among MSPs in the symmetric group. However, significant differences in linear measurements were identified among MSPs in the asymmetric group. Specifically, the upper facial MSP revealed both maxillary and mandibular transverse asymmetries. On the other hand, anterior nasal spine (ANS)-associated MSP could not identify maxillary asymmetry. Furthermore, the menton deviation was approximately 3 mm lower when estimated using the ANS-associated MSP than that using upper facial MSP. Conclusions: The choice of MSP can significantly affect treatment outcomes while diagnosing patients with asymmetry. Therefore, care should be taken when selecting MSP in clinical practice.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.461-462
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• 2008

An elaborate Simulink model for a nonredundant 10bit 20MSPS SAR ADC is proposed to verify its algorithm and to consider the real transistor-level issues of analog blocks. Some electrical trade-offs and power issues are considered.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.197-200
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• 2002

In this paper, presents a 1.8V 8-bit 300MSPS CMOS Subranging Analog to Digital Converter (ADC) with a novel reference multiplex is described. The proposed hか converter is composed of Sub A/D Converter block, MUX (Multiplexer) block and digital block. In order to obtain a high-speed operation, further, a novel dynamic latch, an encoder of novel algorithm and a MUX block are proposed. As a result, this A/D Converter is operated 100MHz input frequence by 300MHz sampling rate.

• Journal of Astronomy and Space Sciences
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• v.31 no.2
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• pp.101-120
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• 2014

The nature of the exotic stellar corpses which reincarnate by consuming their companion is reviewed. Apart from sucking life from their partners, they are actually eating the doomed companions away by their deadly and powerful particle/radiation beams. Such situation resembles that a female "black widow" spider that eats its mate after mating. These celestial zombies are called - Millisecond pulsars (MSPs). In this review article, I will focus on the effort of Fermi Asian Network (FAN) in exploring these intricating objects over the last five years. Two special classes of MSPs are particularly striking. Since Fermi Gamma-ray Space Telescope has started surveying the gamma-ray sky, the population of "black widows" has been boosted. Another dramatic class is so-called "redbacks" (Australian cousin of "black widows") which has just emerged in the last few years. These MSPs provide us with a long-sought missing link in understanding the transition between accretion-powered and rotation-powered systems. The strategy of hunting MSPs through mulitwavelength observations of the unidentified Fermi objects is also reviewed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.352-353
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• 2013

본 연구에서는 12bit 1MSps 연속 근사화 아날로그-디지털 변환기(Analog to Digital Converter : ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 0.18um 1Metal 6Poly CMOS 공정을 이용하였고, Cadence tool을 이용하여 시뮬레이션 및 레이아웃 하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 6mW였고, 입력 신호의 주파수가 100kHz 일 때, SNDR은 69.53dB, 유효 비트수는 11.26bit의 결과를 보였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.293-294
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• 2014

본 논문에서는 MOS 커패시터를 이용하여 12비트 1MSps 연속 근사화 레지스터 아날로그-디지털 변환기(Successive Approximation Register Analog-to-Digital Converter, SAR ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 매그나칩/SK하이닉스 $0.18{\mu}m$ 공정을 이용하였으며, Cadence Tool을 이용하여 시뮬레이션 및 레이아웃을 하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 3.22mW였고, 유효 비트수는 11.5bit의 결과를 보였다.

• Journal of Advanced Marine Engineering and Technology
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• v.39 no.1
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• pp.86-93
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• 2015

Recently, the development of Maritime Service Portfolios (MSPs) for the safe navigation of ship has been discussed internationally. For the successful service of the MSPs, first of all, studies for the standardization about the structure and data structure of MSPs should be preceded. Also, it is necessary to evaluate and assess whether the services are effective for safe navigation, and provided data and portrayal methods are proper. However, because great dangers will be accompanied when untested MSPs about their effectiveness and safety are applied in real ship navigation, it is necessary that effectiveness and safety of the MSPs should be proven under various navigational conditions and environments by simulation. In this paper, we propose a 3D navigation simulation system using desktop PC environment, which is proper for evaluating the effectiveness of MSPs. The system consists of three modules which are simulation scenario editor, 3D visualization of navigational environment and 2D navigational equipment. The scenario editor module provides an environment setting for simulation, such as properties, routes and positions of vessels and aids to navigations. It also provides functions to create a scenario for the simulation to operate. Additionally, the 3D visualization module provides 3D navigational environment which shows interplay between geographical and navigational environment based on the created scenario. The 2D navigational equipment module provides visualization functions of various navigational equipment, shows the interaction between ship's navigational equipment and ship's environment. The simulation scenario, in which various kinds of ships are routing in the port, is created by the developed simulation system, and experimented whether this developed system is appropriate to evaluate and assess the MSPs developed by the International Maritime Organization.

• Journal of Astronomy and Space Sciences
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• v.33 no.1
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• pp.1-11
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• 2016

Over the last few years, the data obtained using the Large Area Telescope (LAT) aboard the Fermi Gamma-ray Space Telescope has provided new insights on high-energy processes in globular clusters, particularly those involving compact objects such as MilliSecond Pulsars (MSPs). Gamma-ray emission in the 100 MeV to 10 GeV range has been detected from more than a dozen globular clusters in our galaxy, including 47 Tucanae and Terzan 5. Based on a sample of known gammaray globular clusters, the empirical relations between gamma-ray luminosity and properties of globular clusters such as their stellar encounter rate, metallicity, and possible optical and infrared photon energy densities, have been derived. The measured gamma-ray spectra are generally described by a power law with a cut-off at a few gigaelectronvolts. Together with the detection of pulsed γ-rays from two MSPs in two different globular clusters, such spectral signature lends support to the hypothesis that γ-rays from globular clusters represent collective curvature emission from magnetospheres of MSPs in the clusters. Alternative models, involving Inverse-Compton (IC) emission of relativistic electrons that are accelerated close to MSPs or pulsar wind nebula shocks, have also been suggested. Observations at >100 GeV by using Fermi/LAT and atmospheric Cherenkov telescopes such as H.E.S.S.-II, MAGIC-II, VERITAS, and CTA will help to settle some questions unanswered by current data.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.365-367
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• 2013

본 논문에서는 $0.18{\mu}m$ CMOS 공정 기술을 이용하여 12-bit 1MSps 연속 근사화 아날로그-디지털 변환기(Analog to Digital Converter : ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 Cadence Tool을 이용하여 시뮬레이션 및 레이아웃을 진행하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 5.5mW였고, 입력 신호의 주파수가 100kHz일 때, SNDR은 70.03dB, 유효 비트수는 11.34bit의 결과를 보였다. 설계된 변환기는 $0.8mm{\times}0.7mm$ 크기로 레이아웃 되었다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.67-74
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• 2004

In this paper, a 3.3V 8-bit 500MSPS based on an interpolation architecture CMOS A/D converter is designed. In order to overcome the problems of high speed operation, a novel pre-amplifier, a circuit for the Reference Fluctuation, and an Averaging Resistor are proposed. The proposed Interpolation A/D Converter consists of Track ＆ Hold, four resistive ladders with 256 taps, 128 comparators, and digital blocks. The proposed A/D Converter is based on 0.35um 2-poly 4-metal N-well CMOS technology. The A/D Converter dissipates 440 mW at a 3.3 Volt single power supply and occupies a chip area of 2250um x 3080um.