• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.399-404
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• 2014

A power amplifier (PA) for a femto-cell base station should be highly efficient, linear and small. The efficiency for amplification of a high peak-to-average power ratio (PAPR) signal was improved by designing an asymmetric Doherty PA (DPA). The linearity was improved by applying third-order inter-modulation (IM3) cancellation method. A small size is achieved by designing the DPA using GaN MMIC process. The implemented 2-stage DPA delivers a power-added efficiency (PAE) of 38.6% and a gain of 33.4 dB with an average power of 34.2 dBm for a 7.2 dB PAPR 10 MHz bandwidth LTE signal at 2.14 GHz.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.686-686
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• 2006

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.329-329
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• 2004

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.1
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• pp.102-109
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• 2000

In this paper, a Low Noise Amplifier for B-WLL was designed using the MMIC technology with GaAs PHEMTs fabricated at our lab. The PHEMT for LNA has a $0.35\mu\textrm{m}$ gate and a total gate width of $120\mu\textrm{m}$. The designed MMIC LNA consists of three stages. The first stage of the LNA has a series inductive feedback for obtaining minimum noise and high stability as well. And the designed MMIC LNA has not an interstage matching circuit between the second and the third stage for minimization of the chip size. From simulation results, noise figure and S21 gain of the designed MMIC LNA are 0.85~1.25 dB and 22.08~23.65 dB in the frequency range of 25.5~27.5 GHz respectively. And the chip size is $3.7\times1.6 mm^2$.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.220-224
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• 2000

AlGaAs/GaAs HBT를 이용하여 1.9 GHz 대역 2단 MMIC 전력증폭기를 설계하였다. HBT의 실측 S 파라미터를 이용하여 정합회로를 설계하였으며, 목적에 따라 적절한 형태의 출력 정합 회로를 하이브리드 형태로 칩 외부에 부가할 수 있도록 설계하였다. HBT의 실측정 S 파라미터의 fitting을 통하여 비선형 등가모델을 추출하였고, load-pull 시뮬레이션으로 최대 출력 정합 임피던스를 결정하였다. 시뮬레이션 결과, 29 dBm의 출력 전력, 40 %의 전력 부가 효율, 그리고 16 dB의 전력 이득을 얻었다.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.179-182
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• 2000

BWLL용 Ka-Band MMIC 저잡음 증폭기 칩을 InGaAs/GaAs 0.15um Gate 길이의 p-HEMT 공정을 이용하여 개발하였다. 칩 크기 2.5$\times$1.5$\textrm{mm}^2$의 2단으로 설계된 칩의 On-wafer 측정 결과, 24～27 GHz BWLL 주파수 대역에서 최소 19$\pm$0.2dB 이득과 최대 1.7dB의 잡음 지수와 최소 13dB의 반사손실의 특성을 얻었다.

• Journal of Advanced Marine Engineering and Technology
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• v.31 no.6
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• pp.777-783
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• 2007

In this work, a highly integrated downconverter MMIC employing HBT(heterojunction bipolar transistor) was developed for application to one chip tranceiver solution of Ku-band commercial wireless communication system. The downconverter MMIC (monolithic microwave integrated circuit) includes mixer filter. amplifier and input/output matching circuit. Especially, spiral inductor structures employing SiN film were used for a suppression of LO and its second harmonic leakage signals. Concretely, they were properly designed so that the self-resonance frequency was accurately tuned to LO and its second harmonic frequency, and they were integrated on the downconverter MMIC.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.654-657
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• 2002

This paper introduces the design and implementation of 40-㎓-band low noise amplifier (LNA) with ultra low gain flatness for wide-band wireless multimedia and satellite communication systems. The 40-㎓-band 4-stage LNA MMIC (Monolithic Microwave Integrated Circuit) demonstrates a small signal gain of more than 20 ㏈, an input return loss of 10.3 ㏈, and an output return loss of 16.3 ㏈ for 37$\square$42 ㎓. The gain flatness of the 40-㎓-band 4-stage LNA MMIC was 0.1 ㏈ for 37$\square$42 ㎓. The noise figure of the 40 ㎓-band LNA was simulated to be less than 2.7 dB for 37~42 ㎓. The chip size of the 4-stage LNA MMIC was 3.7${\times}$1.7 $\textrm{mm}^2$.

• Electronics and Telecommunications Trends
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• v.37 no.5
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• pp.11-21
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• 2022

GaN (Gallium-Nitride) is a promising candidate material in various radio frequency applications due to its inherent properties including wide bandgap, high carrier concentration, and high electron mobility/saturation velocity. Notably, AlGaN/GaN heterostructure field effect transistor exhibits high operating voltage and high power-density/power at high frequency. In next-generation radar systems, GaN power transistors and monolithic microwave integrated circuits (MMICs) are significant components of transmitting and receiving modules. In this paper, we introduce technological trends for C-/X-/Ku-band GaN MMICs including power amplifiers, low noise amplifiers and switch MMICs, focusing on the status of GaN MMIC fabrication technology and GaN foundry service. Additionally, we review the research for the localization of C-/X-/Ku-band GaN MMICs using in-house GaN transistor and MMIC fabrication technology. We also discuss the results of C-/X-/Ku-band GaN MMICs developed at Defense Materials and Components Convergence Research Department in ETRI.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.6
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• pp.247-252
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• 2003

In this paper, we have designed and fabricated a broadband 2-stage MMIC amplifier. Broadband characteristics could be obtained by compensated matching networks in a 2-stage amplifier design. This method is compensating low gains at lower frequencies in the 1st-stage with higher gains at lower frequencies in the 2nd- stage and then finally flat gains are obtained in the wide frequency ranges. Also, we have obtained not only broadband characteristics but also high gain using compensation matching network. The fabricated amplifier is measured by attaching on the test PCB(Printed Circuits Board). The measurement results are bandwidth of 1.1~2.8 GHz, S$_{21}$ gain of 11.1$\pm$0.3 ㏈ and P1㏈ of 12.6 ㏈m at 2.4 GHz.