• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.9
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• pp.54-61
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• 1998

A new Triple well structure is proposed for improved latch-up immunity at deep submicron CMOS device. Optimum latch-up immunity process condition is established and analyzed with varying ion implantation energy and amount of dose and also compared conventional twin well structure. Doping profile and structure are investigated using ATHENA which is process simulator, and then latch-up current is calculated using ATLAS which is device simulator. Two types of different process are affected by latch-up characteristics and shape of doping profiles. Finally, we obtained the best latch-up immunity with 2.5[mA/${\mu}{m}$] trigger current using 2.5 MeV implantation energy and 1$\times$10$^{14}$ [cm$^{-2}$ ] dose at p-well

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.769-772
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• 2014

The device reliability in amorphous InGaZnO under NBS(Negative Bias Stress) and hot carrier stress with different gate overlap has been characterized. Amorphous InGaZnO thin film transistor has been measured. and is channel $width=104{\mu}m$, $length=10{\mu}m$ with gate overlap $length=0,1,2,3{\mu}m$. The device reliability has been analyzed by I-V characteristics. From the experiment results, threshold voltage variation has been increased with increasing of the gate overlap length after hot carrier stress. Also, threshold voltage variation has been decreased and Hump Effect has been observed later with increasing of the gate overlap length after NBS.

• Journal of the Korean Magnetics Society
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• v.25 no.5
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• pp.162-168
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• 2015

The ${\mu}$-turn coil having a width of ${\mu}m$ on the GMR-SV (giant magnetoresistance-spin valve) device based on the antiferromagnetic IrMn layer was fabricated by using the optical lithography process. In the case of GMR-SV film and GMR-SV device, the magnetoresistance ratios and the magnetic sensitivities are 4.4%, 2.0%/Oe and 1.6 %, 0.1%/Oe, respectively. In the y-z plane the distribution of magnetic field of GMR-SV device and $10{\mu}$-turns coil which put under the several magnetic bead(MB)s with a diameter of $1{\mu}m$ attached to RBC (red blood cell) was analyzed by the computer simulation using the finite element method. When the AC currents of 20 kHz from 0.1 mA to 10.0 mA flow to the 10 turns ${\mu}$-coil, the magnetic field at the position of $z=0{\mu}m$ at the center of coil was calculated from $30.1{\mu}T$ to $3060{\mu}T$ in proportion to the current. The magnetic field at the position of $z=10{\mu}m$ was decreased to one-sixth of that of $z=0{\mu}m$. It was confirmed that the $10{\mu}$-turn coil having enough magnitude of magnetic field for the capture of RBC is possible to use as a biosensor for the detection of magnetic beads attached to RBC.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.145-146
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• 2000

Primary emphasis was placed on the electrophoretic deposition of low voltage phosphor to indium-tin oxide-coated glass for the application of field emission display. The phosphor deposited by various parameters, such as deposition time and applied voltages was examined in detail. In addition, a comparison was made by analyzing luminance properties of the phosphor mixed with and without conducting $In_2O_3$ powder of less than 1um size. The measurement was performed as a function of $In_2O_3$ concentration from 3% to 15% by weight. The enhanced impact of indium powder mixing on the phosphor was clearly demonstrated by aging performance curve at 1000V excitation voltages with a current density of $1\;mA/cm^2$

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.4
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• pp.325-331
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• 2007

In this study, the inter-metal dielectric material of FSG was changed by low-k material in $0.13{\mu}m$ foundry-compatible technology (FCT) device process based on fluorinated silicate glass (FSG). Black diamond (BD) was used as a low-k material with a dielectric constant of 2.95 for optimization and yield-improvement of the low-k based device process. For yield-improvement in low-k based device process, some problems such as photoresist (PR) poisoning, damage of low-k in etch/ash/cleaning process, and chemical mechanical planarization (CMP) delamination must be solved. The PR poisoning was not observed in BD based device. The pressure in CMP process decreased to 2.8 psi to remove the CMP delamination for Cu-CMP and USG-CMP. $H_2O$ ashing process was selected instead of $O_2$ ashing process due to the lowest condition of low-k damage. NE14 cleaning after ashing process lot the removal of organic residues in vias and trenches was employed for wet process instead of dilute HF (DHF) process. The similar-state of SRAM yield was obtained in Cu/low-k process compared with the conventional $0.13{\mu}m$ FCT device by the optimization of these process conditions.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.40-47
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• 2016

In this paper, a dual mode buck converter with an ability to change mode is proposed, which is suitable particularly for portable device. The problem of conventional mode control circuit is affected by load variation condition such as suddenly or slowly. To resolve this problem, the mode control was designed with slow clock method. Also, when change from the PFM(Pulse Frequency Modulation) mode to the PWM(Pulse Width Modulation) mode, to use the counter to detect a high load. And the user can select mode transition point in load range from 20mA to 90mA by 3 bit digital signal. The circuits are implemented by using BCDMOS 0.18um 2-polt 3-metal process. Measurement environment are input voltage 3.7V, output voltage 1.2V and load current range from 10uA to 500mA. And measurement result show that the peak efficiency is 86% and ripple voltage is less 32mV.

• Information and Communications Magazine
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• v.30 no.7
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• pp.58-62
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• 2013

최근에 ICT 기반의 융합 서비스 분야로 인구 밀집지역인 메가 시티에서의 교통, 전력, 상/하수도, u-헬스, 안전/보안등의 문제들을 근본적으로 해결하기 위하여 ICT기반 개방형 플랫폼을 이용한 서비스 인프라 구축 및 개선을 위한 연구들이 많이 진행되고 있다. 이러한 ICT 기반의 융합 인프라 구축 서비스들은 M2M(Machine to Machine)과 D2D(Device to Device)를 기본 연결 수단으로 사용하고 있으며, 이들을 기반으로 서비스 정보 전달 및 제어 정보를 실시간으로 처리하기 위한 IP 기반의 플랫폼이 지원되어야만 융합 서비스가 지속적으로 제공 가능할 것이다. 이들 융합서비스 중에서 전력과 관련하여 한국의 스마트그리드 사업은 기후 변화 대응을 위하여CO2 배출을 줄이고, 에너지 효율을 향상하여 새로운 비즈니스 모델을 만들어 일자리와 신산업을 창출하기 위한 국가 프로젝트로 진행되었다. 그러나, 현재의 전력관련 국내 상황을 살펴보면 여름철과 겨울철에 반복적인 전력 수급 불안으로 인해 피크 전력에 대한 예비력이 부족하여 국가적인 재난인 블랙 아웃의 위기를 걱정하고 있는 실정이다. 본고에서는 한국의 스마트그리드 제주실증단지 사업과 관련하여 현황 및 개선 사항들을 알아보고, 향후 거점지구와 국가 단위의 서비스 확장을 위하여ICT 기반의 개방형 인프라 플랫폼 기술의 중요성을 강조하고자 한다. 이러한 M2M과 D2D를 기반으로 하는 융합 서비스의 성공적인 수행은ICT 기반의 개방형 플랫폼의 우선적인 개발이 필요하며, 플랫폼 기반의 디바이스 보급과 네트워크의 구축이 진행되어야 지속 가능한 융합 서비스를 제공할 수 있을 것이다.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2006.05a
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• pp.225-231
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• 2006

.고상반응법 (solid state reaction)합성된 ZnS:Mn,Cu,Cl 형광체는 약 $20^{\sim}25{\mu}m$ 의 구형이고, Cubic/hexagonal 구조를 보였다. Electroluminescent device(ELD)는 실크 스크린된 형광층(ZnS:Mn,Cu,Cl)/유전체층 ($BaTiO_3$)으로 구성되었으며, 각층은 $30^{\sim}50{\mu}m,\;50^{\sim}60{\mu}m$ 정도로 도포 하였다. 100 V-400 Hz 의 구동조건에서, ELD 의 백색 발광은 450 nm, 480 nm 픽에서 각각 $Cl_s{\to}Cu^{+}\;_{Zn},\;Cl_s{\to}Cu^{2+}\;_{Zn}$ 전이에 의해 중첩된 청색, 녹색 밴드의 발광과, 580 nm 픽에서 Mn 의 $^{4}T_1{\to}^{6}A_1$ 전이에 의한 황색 밴드의 발광으로 이루어진다. Cu 농도의 증가에 따라 450 nm 의 발광 밴드의 휘도는 감소하며 580 nm 의 발광 밴드의 휘도가 증가하였고 발광 휘도가 향상되었다. 즉, 색온도가 높은 cold white(10000 K)에서 색온도가 낮은 Warm white(3000 K) 로 변한다. 이것은 450 nm 의 발광 밴드가 580 nm 의 발광 밴드에 흡수되는 에너지 전이 (Energy transfer) 현상에 기인한다. ZnS:Mn,Cu,Cl 의 Mn 1.5 wt %, Cu 2.5 wt.% 에서 최적 발광 휘도를 보이며, 100 V-400 Hz 에서 약 $12cd/cm^2$이였다.

• Korean Journal of Materials Research
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• v.18 no.5
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• pp.272-276
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• 2008

In submicron MOSFET devices, maintaining the ratio between the channel length (L) and the channel depth (D) at 3 : 1 or larger is known to be critical in preventing deleterious short-channel effects. In this study, n-type SOI-MOSFETs with a channel length of $0.1\;{\mu}m$ and a Si film thickness (channel depth) of $0.033\;{\mu}m$ (L : D = 3 : 1) were virtually fabricated using a TSUPREM-4 process simulator. To form functioning transistors on the very thin Si film, a protective layer of $0.08\;{\mu}m$-thick surface oxide was deposited prior to the source/drain ion implantation so as to dampen the speed of the incoming As ions. The p-type boron doping concentration of the Si film, in which the device channel is formed, was used as the key variable in the process simulation. The finished devices were electrically tested with a Medici device simulator. The result showed that, for a given channel doping concentration of $1.9{\sim}2.5\;{\times}\;10^{18}\;cm^{-3}$, the threshold voltage was $0.5{\sim}0.7\;V$, and the subthreshold swing was $70{\sim}80\;mV/dec$. These value ranges are all fairly reasonable and should form a 'magic region' in which SOI-MOSFETs run optimally.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.9
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• pp.19-24
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• 2004

In this paper, we have demonstrated the fabrication of a 70 nm foot print of the T-gate by using a positive resist ZEP520/P(MMA-MAA)/PMMA trilayer by double exposure method without a thin dielectric supporting layer on the substrate. The device performance was characterized by DC and RF measurement. The fabricated 70 nm InGaAs/InAlAs MHEMTS with 70 ${\mu}{\textrm}{m}$ unit gate width and 2 fingers showed good DC and RF characteristics of Idss, max =228.6 mA/mm, gm =645 mS/mm, and fT =255 GHz, respectively.