Study of relation between gate overlap length and device reliability in amorphous InGaZnO thin film transistors

비정질 InGaZnO 박막트랜지스터에서 Gate overlap 길이와 소자신뢰도 관계 연구

The device reliability in amorphous InGaZnO under NBS(Negative Bias Stress) and hot carrier stress with different gate overlap has been characterized. Amorphous InGaZnO thin film transistor has been measured. and is channel $width=104{\mu}m$, $length=10{\mu}m$ with gate overlap $length=0,1,2,3{\mu}m$. The device reliability has been analyzed by I-V characteristics. From the experiment results, threshold voltage variation has been increased with increasing of the gate overlap length after hot carrier stress. Also, threshold voltage variation has been decreased and Hump Effect has been observed later with increasing of the gate overlap length after NBS.

비정질 InGaZnO 박막트랜지스터의 Gate Overlap 길이에 따른 NBS(Negative Bias Stress) 및 hot carrier 스트레스 후 시간별 문턱전압의 변화에 의한 소자신뢰도를 분석하였다. 측정에 사용된 소자는 비정질 InGaZnO TFT이며 채널 폭 $W=104{\mu}m$, 게이트 길이 $L=10{\mu}m$이며 Gate Overlap 길이는 $0,1,2,3{\mu}m$를 사용하였다. 소자 신뢰도는 전류-전압을 측정하여 분석하였다. 측정 결과, hot carrier 스트레스 후 Gate Overlap 길이가 증가할수록 문턱전압의 변화가 증가하였다. 또한, NBS 후에는 Gate Overlap 길이가 증가할수록 문턱전압의 변화가 감소하였고 장시간 스트레스 후에 hump가 발생하였다.