• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.2
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• pp.1027-1035
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• 2014

The most important design factor for portable devices is power consumption. In this paper, in the early design stage of a mobile device which measures temperature and humidity a power consumption model will be proposed and then the overall power consumption will be estimated based on this model. We will verify previously the correctness of such estimated power consumption before implementation of the real device. That is our proposed design methodology based on power consumption model. An improved design method for efficiently reducing the current consumption in the idle mode is also presented. By implementing a real prototype of the mobile device for measuring temperature and humidity, the correctness of our proposed design methodology based on power consumption modeling will be verified.

• ETRI Journal
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• v.37 no.1
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• pp.107-117
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• 2015

This paper presents an energy-efficient (low power) prime-field hyperelliptic curve cryptography (HECC) processor with uniform power draw. The HECC processor performs divisor scalar multiplication on the Jacobian of genus 2 hyperelliptic curves defined over prime fields for arbitrary field and curve parameters. It supports the most frequent case of divisor doubling and addition. The optimized implementation, which is synthesized in a $0.13{\mu}m$ standard CMOS technology, performs an 81-bit divisor multiplication in 503 ms consuming only $6.55{\mu}J$ of energy (average power consumption is $12.76{\mu}W$). In addition, we present a technique to make the power consumption of the HECC processor more uniform and lower the peaks of its power consumption.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.397-398
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• 2013

Fairchild Green Mode off line buck switch for low standby power consumption and high reliability is presented. By reducing operating current and optimizing switching frequency, 20mW power consumption is achieved. High performance trans-conductance amplifier and green mode function improve the ripple and regulation in the output voltage. The conventional $FPS^{TM}$ buck and novel Fairchild buck switch are compared to show the improvement of performance. Experimental results are showed using 2W evaluation board.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.5
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• pp.963-970
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• 2008

Recently, several papers for reading meters remotely using RFID/USN technologies have been presented. In the case of water meter, there has been neither commercial product nor paper. In this paper, we describe the design and implementation of wireless digital water meter with low power consumption. We use magnetic hole sensors to compute the amount of water consumption. The meter of water consumption is transferred via ZigBee wireless protocol to a gateway. Low power consumption design is essential since a battery should last till the life time of water meter. We present that dual batteries haying 3V, 3000mAh, would last 8 years by analyzing the real power consumption of our water meter.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.222-225
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• 2006

A custom-made display driver for an electronic paper is presented, which has high-voltage multilevel output capability and extremely low power consumption. An original level-shifter circuit can effectively reduce the power consumption and the chip area. This driver was implemented to a Quick-Response Liquid Powder Display (QR-LPD) and the image quality and power consumption was estimated.

• Journal of IKEEE
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• v.12 no.2
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• pp.75-80
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• 2008

There are many researches to reduce power consumption of battery-operated Transceiver for 2.4 GHz smartRF applications. However, components such as processor, memory and LCD based power managements reach the limit of reducing power consumption. To overcome the limit, this research proposes novel low-power Transceiver and transceiver Hardware Design. Experimental results in the real smartRF Transceiver show that the proposed methods can reduce power consumption additionally than component based power managements.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.167-181
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• 2001

A stepwise driving method was used for reducing the AC power consumption in a TFT-LCD. The AC power takes the largest portion of the total power consumption of a TFT-LCD. Experimental results confirmed that the AC power saving efficiency reached up to 75% when a 5-stepwise driving with each step time of $2\mu$ sec was applied to a 14.1 inch-diagonal XGA TFT-LCD. The second largest component of power consumption called the DC power comes from the quiescent currents in Op-amps. A simple and efficient architecture was proposed in this work to reduce this DC power consumption: Half of the Op-amps have the 5V-supplies, and the rest half have the 10V-supplies, and two Op-amps are shared by adjacent two channels. Measurements of test circuits showed that this simple method could reduce over 40% of the DC power consumption..

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.402-403
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• 2009

A variety of power reduction technologies is introduced and the benefits of the technologies are discussed. PenTile$^{(R)}$ DBLC (Dynamic Brightness LED Control) combined with SABC (Sensor-Based Adaptive Brightness Control) enables to achieve the average LED power consumption to one third. The panel power reduction of 25% can be achieved with low power driving technology, ALS (Active Level Shifter). MIP (Memory In Pixel) is expected to be useful in transflective display because the whole display area can be utilized in reflective mode with power consumption of 1mW.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.11a
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• pp.44-47
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• 2011

In this paper, we propose context-aware based on Low Power Sensing Algorithm. The proposed sensing algorithm reduces power consumptions using low-power sensing algorithms and low-power sensing protocols. Experimental results show that the average power consumption of the proposed method is up to half consumption that of the conventional method.

• Journal of Korea Society of Digital Industry and Information Management
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• v.4 no.1
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• pp.9-16
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• 2008

This paper presents a frequency selection algorithm for minimization power consumption of processor in Mobile System. The proposed algorithm has processor designed low power processor using clock gating method. Clock gating method has improved the power dissipation by control main clock through the bus which is embedded clock block applying the method of clock gating. Proposed method has compared power consumption considered the dynamic power for processor, selected frequency has considered energy gain and energy consumption for designed processor. Or reduced power consumption with decreased processor speed using slack time. This technique has improved the life time of the mobile systems by clock gating method, considered energy and using slack time. As an results, the proposed algorithm reduce average power saving up to 4% comparing to not apply processor in mobile system.