• 제목/요약/키워드: Low-power Technique

검색결과 1,169건 처리시간 0.039초

Pulse Counting Sensorless Detection of the Shaft Speed and Position of DC Motor Based Electromechanical Actuators

  • Testa, Antonio;De Caro, Salvatore;Scimone, Tommaso;Letor, Romeo
    • Journal of Power Electronics
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    • 제14권5호
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    • pp.957-966
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    • 2014
  • Some of DC actuators used in home automation, office automation, medical equipment and automotive systems require a position sensor. In low power applications, the introduction of such a transducer remarkably increases the whole system cost, which justifies the development of sensorless position estimation techniques. The well-known AC motor drive sensorless techniques exploiting the fundamental component of the back electromotive force cannot be used on DC motor drives. In addition, the sophisticated approaches based on current or voltage signal injection cannot be used. Therefore, an effective and inexpensive sensorless position estimation technique suitable for DC motors is presented in this paper. This technique exploits the periodic pulses of the armature current caused by commutation. It is based on a simple pulse counting algorithm, suitable for coping with the rather large variability of the pulse frequency and it leads to the realization of a sensorless position control system for low cost, medium performance systems, like those in the field of automotive applications.

정지형 UPS의 병렬운전 제어 (The Parallel Operation Control of Static UPSs)

  • 민병권;원충윤
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제48권7호
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    • pp.363-368
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    • 1999
  • The parallel operation system of multiple uninterruptible power supplies(UPSs) is used to increase power capacity of the system or to secure higher reliability at critical loads. In the parallel operation of the two UPSs, the load-sharing control to maintain the current balance between them is a key technique. Because a UPS has low output impedance and quick response characteristics, in case of an unbalanced load inverter output current changes very rapidly and thereby can instantaneously reach an overload condition. In this study, high precise load-sharing controller is proposed and implemented for the parallel operation system of two UPSs with low impedance characteristics and this controller controls the frequency and the voltage to minimize the active power component and the reactive power component which are gotten from the current difference between two UPSs. And then a good performance of the proposed method is verified by experiments in the parallel operation system with two 40KVA UPSs.

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레이저 다이오드를 이용한 이진 신호누적 방식의 거리측정기 기술 (A DLRF(Diode Laser Range Finder) Using the Cumulative Binary Detection Algorithm)

  • 양동원
    • 한국군사과학기술학회지
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    • 제10권4호
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    • pp.152-159
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    • 2007
  • In this paper, a new design technique on the LRF which is useful for low power laser and a CBDA(Cummulative Binary Detection Algorithm) is proposed. The LD(Laser Diode) and Si-APD(Silicon Avalanche Photo Diode) are used for saving a power. In order to prove the detection range, the Si-APD binary data are accumulated before the range computation and the range finding algorithm. A prototype of the proposed DLRF(Diode Laser Range Finder) system was made and tested. An experimental result shows that the DLRF system have the same detection range using a less power(almost 1/32) than an usual military LRF. The proposed DLRF can be applied to the Unmanned Vehicles, Robot and Future Combat System of a tiny size and a low power LRF.

고효율 소프트스위칭 방식의 플라이백컨버터의 구현 (Implementation of High Efficiency Soft-switching Flyback Converter)

  • 유두희;이재민;정강률
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2008년도 하계학술대회 논문집
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    • pp.55-57
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    • 2008
  • Recently, power supplies with low voltage/high current output are widely used, but conventional power supplies have large power loss, and thus the system efficiency is low. However their control technique is complicated and their elements are many. In this paper, Implementation of High Efficiency Soft-switching Flyback Converter is presented. The proposed converter has been implemented to verify the proposed topology with 5V/20A prototype and theoretical operation under various load condition and universal input voltage range.

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저 비트율 전력선 모뎀에 대한 저압 댁내망의 채널 특성 시뮬레이션 기법에 관한 연구 (A Simulation Technique for the Characterization of the Low-bit-rate Household AC Power Line Communication Channel)

  • 안남호;정태규
    • 대한전기학회논문지:시스템및제어부문D
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    • 제51권5호
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    • pp.197-202
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    • 2002
  • In this paper, the characteristics of the household AC power line network is analyzed for the low bit rate powerline communication (PLC) in the frequency range from 10㎑ to 450㎑ The PLC channel transfer characteristics including its characteristic impedance are derived based on the network topology which is constructed with the household power lines loaded with the various types of electric apparatus. Both the distributed circuit analysis and the lumped circuit model based analysis are applied for the characterization of the PLC channel and the results are compared by the computer simulations. The analysis illustrates very well the adverse effects caused by the loading of electric apparatus and as well those casued by the reflection of wavers in the household AC Power line communication network.

CMOS 공정을 이용한 Cascode 구조의 LNA 설계 (The Study on Design of the CMOS Cascode LNA)

  • 오재욱;하상훈;김형석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1601-1602
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    • 2006
  • A cascode low noise amplifier(LNA) for a 2.45GHz RFID reader is designed using 0.25um CMOS technology. There are four LNA design techniques applied to the cascode topology. In this paper, power-constrained simultaneous noise and input matching(PCSNIM) technique is used for low power consumption and achieving the noise matching and input matching simultaneously. Simulation results demonstrate a noise figure of 2.75dB, a power gain of 10.17dB, and a dissipation power of 8.65mW with 1V supply.

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PWM 제어를 이용한 고역율, 저교조파형 고출력 Sepic 컨버터에 관한 연구 (A study on the high-power Sepic converter for high-power-factor, low current harmonics using PWM control)

  • 주형종;권명일;장도현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 B
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    • pp.1211-1213
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    • 2003
  • A pulse width modulation(PWM) method for single-phase Sepic-type rectifier is introduced in this paper. The characteristics of the proposed PWM system are high performance high power factor with low input current harmonic distortion. The proposed control method is based on the average-current-mode using the dedicated integrated circuit UC3854 this technique it is possible to implement a very simple control circuit for unitary power-factor in CCM operation and also to provide over-current protection.

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저용량 가전용 40V급 Power MOSFET 소자의 설계 및 제작에 관한 연구 (A Design of 40V Power MOSFET for Low Power Electronic Appliances)

  • 강이구;안병섭;남태진;김범준;이용훈;정헌석
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.115-115
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    • 2009
  • Current sensing in power semiconductors involves sensing of over-current in order to protect the device from harsh conditions. This technique is one of the most important functions in stabilizing power semiconductor device modules. The Power MOSFET is very efficient method with low power consumption, fast sensing speed and accuracy. In this paper, we have analyzed the characteristics of proposed sense FET and optimized its electrical characteristics to apply conventional 40 V power MOSFET by numerical and simulation analysis. The proposed sense FET has the n-drift doping concentration $1.5\times10^{14}\;cm^{-3}$, size of $600\;{\mu}m^2$ with $4.5\;{\Omega}$, and off-state leakage current below $50\;{\mu}A$. We offer the layout of the proposed Power MOSFET to process actually. The offerd design and optimization methods are meaningful, which the methods can be applied to the power devices having various breakdown voltages for protection.

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CMOS 저잡음 기가비트급 광전단 증폭기 설계 (CMOS Gigahertz Low Power Optical Preamplier Design)

  • 황용희;강진구
    • 전기전자학회논문지
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    • 제7권1호
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    • pp.72-79
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    • 2003
  • 일반적으로 p-i-n Photodiode 수신기의 광신호처리 전단증폭기의 설계에서 공통소스 입력단을 사용하는 트랜스임피던스(Transimpedance)구조로 설계한다. 본 논문에서는 공통게이트 입력단을 사용하는 전류모드 광전단증폭기를 설계하였다. 이러한 광전단증폭기로 사용되는 전류모드 공통게이트 트랜스임피던스 증폭기의 특징은 높은 이득과 높은 대역폭을 동시에 얻을 수 있다는 것이다. 본 논문에서는 광전단 증폭기 설계에서 잡음 최적화를 이용하여 설계과정을 자동화 시킴으로써 보다 단순하게 트랜스임피던스 증폭기를 설계하는 기법을 제시하였다. 그리고 커패시턴스 피킹(Capacitive Peaking) 기술을 사용하여 대역폭을 더욱 증가시킬 수 있다. 제안하는 기법을 사용하여 설계된 전류모드 광전단 증폭기에 캐패시턴스 피킹을 적용하여 0.35um CMOS 공정을 사용할 경우 대역폭이 1.57GHz이고, 트랜스임피던스 이득이 2.34k, 입력 잡음전류가 470nA이고 입력 잡음 전류의 주파수밀도(spectral density)가 6.13pA/ 인 저 잡음의 고속 전류모드 트랜스임피던스 광전단증폭기를 설계 하였다. 시뮬레이션 결과 제안된 광전단증폭기의 전력소비는 3.3V 공급전압에서16.84mW이었다.

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A Maximum Power Control of IPMSM with Real-time Parameter Identification

  • Jun, Hyunwoo;Ahn, Hanwoong;Lee, Hyungwoo;Go, Sungchul;Lee, Ju
    • Journal of Electrical Engineering and Technology
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    • 제12권1호
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    • pp.110-116
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    • 2017
  • This paper proposed a new real-time parameter tracking algorithm. Unlike the convenience algorithms, the proposed real-time parameter tracking algorithm can estimate parameters through three-phase voltage and electric current without coordination transformation, and does not need information on magnetic flux. Therefore, it can estimate parameters regardless of the change according to operation point and cross-saturation effect. In addition, as the quasi-real-time parameter tracking technique can estimate parameters through the four fundamental arithmetic operations instead of complicated algorithms such as numerical value analysis technique and observer design, it can be applied to low-performance DSP. In this paper, a new real-time parameter tracking algorithm is derived from three phase equation. The validity and usefulness of the proposed inductance estimation technique is verified by simulation and experimental results.