• Title/Summary/Keyword: Low-power Bus

Search Result 195, Processing Time 0.023 seconds

Accelerating Memory Access with Address Phase Skipping in LPDDR2-NVM

  • Park, Jaehyun;Shin, Donghwa;Chang, Naehyuck;Lee, Hyung Gyu
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.14 no.6
    • /
    • pp.741-749
    • /
    • 2014
  • Low power double data rate 2 non-volatile memory (LPDDR2-NVM) has been deemed the standard interface to connect non-volatile memory devices such as phase-change memory (PCM) directly to the main memory bus. However, most of the previous literature does not consider or overlook this standard interface. In this paper, we propose address phase skipping by reforming the way of interfacing with LPDDR2-NVM. To verify effectiveness and functionality, we also develop a system-level prototype that includes our customized LPDDR2-NVM controller and commercial PCM devices. Extensive simulations and measurements demonstrate up to a 3.6% memory access time reduction for commercial PCM devices and a 31.7% reduction with optimistic parameters of the PCM research prototypes in industries.

Optimized PWM Switching Strategy for an Induction Motor Voltage Control

  • Lee, Hae-Hyung;Hwang, Seuk-Yung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1998.06a
    • /
    • pp.527-533
    • /
    • 1998
  • An optimized PWM switching strategy for an induction motor voltage control is developed and demonstrated. Space vector modulation in voltage source inverter offers improved DC-bus utilization and reduced commutation losses, and has been therefor recognizedas the perfered PWM method, especially in the case of digital implementation. Three-phase invertor voltage control by space vector modulation consists of switching between the two active and one zero voltage vector by using the proposed optimal PWM algorithm. The prefered switching sequence is defined as a function of the modulation index and period of a carrier wave. The sequence is selected by suing the inverter switching losses and the current ripple as the criteria. For low and medium power application, the experimental results indicate that good dynamic response and reduced harmonic distortion can be achieved by increasing switching frequency.

  • PDF

A Study on Integrated Small Signal Stability Analysis of Power Systems (계통의 종합적 미소신호 안정도해석에 관한 연구)

  • Nam, Ha-Kon;Song, Sung-Geun;Kim, Yong-Gu;Shim, Kwan-Shik
    • Proceedings of the KIEE Conference
    • /
    • 1998.11b
    • /
    • pp.685-688
    • /
    • 1998
  • In this research project, two aspects of small signal stability are studied: improvement in Hessenberg method to compute the dominant electromechanical oscillation modes and siting FACTS devices to damp the low frequency oscillation. Fourier transform of transient stability simulation results identifies the frequencies of the dominant oscillation modes accurately. Inverse transformation of the state matrix with complex shift equal to the angular speed determined by Fourier transform enhances the ability of Hessenberg method to compute the dominant modes with good selectivity and small size of Hessenberg matrix. Any specified convergence tolerance is achieved using the iterative scheme of Hessenberg method. Siting FACTS devices such as SVC, STACOM, TCSC, TCPR and UPFC has been studied using the eigen-sensitivity theory of augmented matrix. Application results of the improved Hessenberg method and eigen-sensitivity to New England 10-machine 39-bus and KEPCO systems are presented.

  • PDF

Feasibility and Performance Analysis of RDMA Transfer through PCI Express

  • Choi, Min;Park, Jong Hyuk
    • Journal of Information Processing Systems
    • /
    • v.13 no.1
    • /
    • pp.95-103
    • /
    • 2017
  • The PCI Express is a widely used system bus technology that connects the processor and the peripheral I/O devices. The PCI Express is nowadays regarded as a de facto standard in system area interconnection network. It has good characteristics in terms of high-speed, low power. In addition, PCI Express is becoming popular interconnection network technology as like Gigabit Ethernet, InfiniBand, and Myrinet which are extensively used in high-performance computing. In this paper, we designed and implemented a evaluation platform for interconnect network using PCI Express between two computing nodes. We make use of the non-transparent bridge (NTB) technology of PCI Express in order to isolate between the two subsystems. We constructed a testbed system and evaluated the performance on the testbed.

A Study on Integrated Small Signal Stability Analysis of Power Systems (계통의 종합적 미소신호 안정도해석에 관한 연구)

  • Nam, Ha-Kon;Song, Sung-Geun;Kim, Yong-Gu;Kim, Kwan-Shik
    • Proceedings of the KIEE Conference
    • /
    • 1998.11a
    • /
    • pp.365-368
    • /
    • 1998
  • In this research project two aspects of small signal stability are studied: improvement in Hessenberg method to compute the dominant electromechanical oscillation modes and siting FACTS devices to damp the low frequency oscillation. Fourier transform of transient stability simulation results identifies the frequencies of the dominant oscillation modes accurately. Inverse transformation of the state matrix with complex shift equal to the angular speed determined by Fourier transform enhances the ability of Hessenberg method to compute the dominant modes with good selectivity and small size of Hessenberg matrix. Any specified convergence tolerance is achieved using the iterative scheme of Hessenberg method. Siting FACTS devices such as SVC, STACOM, TCSC, TCPR and UPFC has been studied using the eigen-sensitivity theory of augmented matrix. Application results of the improved Hessenberg method and eigen-sensitivity to New England 10-machine 39-bus and KEPCO systems are presented.

  • PDF

The De-CH4 Characteristics of NGOC for CH4 Reduction of a CNG Bus (CNG 버스의 CH4 저감용 NGOC의 de-CH4 특성)

  • Seo, Choong-Kil;Choi, Byung-Chul
    • Journal of Power System Engineering
    • /
    • v.20 no.4
    • /
    • pp.69-74
    • /
    • 2016
  • Recently, in order to meet the stricter emission regulations, the proportion of after-treatments for vehicle and vessel is increasing gradually. The purpose of this study is to investigate the de-$CH_4$ characteristics of NGOC in front of proposed combined system according to additive catalyst and support ratio. In the case of Pd addition, the de-$CH_4$ performance of 2Pt-2Pd-3MgO/$Al_2O_3$ NGOC was improved by approximately 10 to 20% for the HC components. The de-$CH_4$ performance of 2Pt-2Pd-3Cr-3MgO/$Al_2O_3$ NGOC was higher compared to five kinds of NGOC catalysts, because Cr particle was smaller and dispersion of Pd was increased. The NGOC(Zeolite:$Al_2O_3$(80%:20%)}catalyst according to support ratio, was improved performance at low temperature region on CO and NO conversion rate.

A Study on the TRV(SLF) of Circuit Breakers According to Install Current Limit Reactors (345kV 고장전류 저감을 위한 한류리액터 설치시 차단기 TRV(근거리 고장시) 검토)

  • Park, H.S.;Kwak, J.S.;Ju, H.J.;Ryu, H.Y.;Han, S.O.
    • Proceedings of the KIEE Conference
    • /
    • 2005.07a
    • /
    • pp.371-373
    • /
    • 2005
  • An enhancement for a transmission and substation equipment in power system make the system impedance to be lower. In principle, if the system impedance become low, system stability will be better, but the fault current become very higher. It is a very big problem for CB operating. As a fact of CB operating performance, high amplitude of the fault current may cause CB operation failure because of exceeding standard value in TRV. So we simulated TRV by using the EMTP. Generally there are two types of TRV in actual power system. One is short line fault, the other is bus terminal fault. In this paper, we simulated the TRv at short line fault as installed current limit reactors to reduce fault current in 345kV ultra-high voltage system. Short line fault is caused from single line fault in transmission line.

  • PDF

An Energy-Efficient MAC Protocol for Wireless Wearable Computer Systems

  • Beh, Jounghoon;Hur, Kyeong;Kim, Wooil;Joo, Yang-Ick
    • Journal of information and communication convergence engineering
    • /
    • v.11 no.1
    • /
    • pp.7-11
    • /
    • 2013
  • Wearable computer systems use the wireless universal serial bus (WUSB), which refers to USB technology that is merged with WiMedia physical layer and medium access control layer (PHY/MAC) technical specifications. WUSB can be applied to wireless personal area network (WPAN) applications as well as wired USB applications such as PAN. WUSB specifications have defined high-speed connections between a WUSB host and WUSB devices for compatibility with USB 2.0 specifications. In this paper, we focus on an integrated system with a WUSB over an IEEE 802.15.6 wireless body area network (WBAN) for wireless wearable computer systems. Due to the portable and wearable nature of wearable computer systems, the WUSB over IEEE 802.15.6 hierarchical medium access control (MAC) protocol has to support power saving operations and integrate WUSB transactions with WBAN traffic efficiently. In this paper, we propose a low-power hibernation technique (LHT) for WUSB over IEEE 802.15.6 hierarchical MAC to improve its energy efficiency. Simulation results show that the LHT also integrates WUSB transactions and WBAN traffic efficiently while it achieves high energy efficiency.

A Novel Non-Isolated DC-DC Converter with High Efficiency and High Step-Up Voltage Gain (고효율 및 고변압비를 가진 새로운 비절연형 컨버터)

  • Amin, Saghir;Tran, Manh Tuan;Choi, Woojin
    • Proceedings of the KIPE Conference
    • /
    • 2019.07a
    • /
    • pp.11-13
    • /
    • 2019
  • This paper proposes a novel high step-up non-isolated DC-DC converter, suitable for regulating dc bus in various inherent low voltage micro sources especially for photovoltaic (PV) and fuel cell sources. This novel high voltage Non-isolated Boost DC-DC converter topology is best replacement, where high voltage conversion ratio is required without the transformer and also need continuous input current. Since the proposed topology utilizes the stack-based structure, the voltage gain, and the efficiency are higher than other conventional non-isolated converters. Switches in this topology is easier to control since its control signal is grounding reference. Also, there is no need of extra gate driver and extra power supply for driver circuit, which reduces the cost and size of system. In order to show the feasibility and practicality of the proposed topology principle operation, steady state analysis and simulation result is presented and analyzed in detail. To verify the performance of proposed converter and theoretical analysis 360W laboratory prototype is implemented.

  • PDF

The Study on DBPL Encoder Design for Railway Balise Application (철도 발리스 응용을 위한 DBPL 인코더 설계 연구)

  • Lee, Jeong-jun;Yang, Doh-chul;Kim, Seong-jin;Kim, Bong-seob;Kim, Yu-hyeon
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.16 no.2
    • /
    • pp.161-170
    • /
    • 2017
  • The balise is a device for the railroad signal control systems, which is installed between both rail. The balise sends fixed or variable data, named telegram, to the train with wireless method. The telegram includes the position information, the movable distance under the signal status, the gradient, the speed, the temporary speed limit, etc. This research is on a design of the DBPL encoder for the balise. Normally the DBPL encoder for the balise is with the ASIC or FPGA technology. In this research, the DBPL encoder is designed with commercial low power operable micro-controller. The firmware(logic level encode) and the SPI Bus function block(physical level output) of the micro-controller are used for the DBPL encode. Under the european standard, the required working speed of the DBPL encoder is 564.48Kbps. The DBPL encoder of this research is tested under the speed of 564.48Kbps, and it worked properly.