• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.5C
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• pp.532-538
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• 2003

In this paper we have investigated a novel approach applying low-density parity-check coding to a COFDM-CDMA system, which operates in a multi-path fading mobile channel. Developed as a linear-block channel coder, the LDPC code is known for a superior signal reception capability in AWGN and/or flat fading channels with respect to increased encoding rates, however, its performance degrades when the communication channel becomes multi-path fading. For a typical multi-path fading mobile channel with a SNR of 16㏈ or lower. in order to obtain a BER lower than 1 out of 10000, the LDPC code with encoding rates below 1:3 requires not only the inherent parity check information but also the piloting information for refreshing front-end equalizer taps of COFDM-CDMA, periodically. For instance, while the 1:3-rate LDPC coded transmission symbol is consisted of data bits and parity-check bits in 1 to 3 proportion, on the other hand, in the proposed method the same rate LDPC transmission symbol contains data bits, parity check bits, and pilot bits in 1 to 2 to 1 proportion, respectively. The included pilot bits are effective not only for channel estimation and channel equalization but for symbol decoding by assisting the parity-check bits, hence, improving SNR vs BER performance over the conventional 1:3-rate LDPC code. The proposed system performance has been verified using computer simulations in multi-path, Rayleigh fading channels, and the results show us that the proposed method out-performs the general LDPC channel coding methods in terms of SNR vs BER measurements.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.8
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• pp.1149-1154
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• 2013

In this paper, an algorithm having new edge growth with depth constraints for constructing Tanner graph of LDPC(Low density parity check) codes is proposed. This algorithm reduces effectively the number of small stoping set in the graph and has lower complexity than other algorithm. The simulation results shows the improved performance of the LDPC codes constructed by this algorithm.

• Journal of Broadcast Engineering
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• v.24 no.7
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• pp.1221-1227
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• 2019

This paper describes a low-density parity-check (LDPC) coded index modulated orthogonal frequency division multiplexing with quasi-orthogonal sequence (IM-OFDM-QOS) and provides performance evaluations of the proposed system. By using QOS as the spreading code, IM-OFDM-QOS scheme can improve the reception performance than IM-OFDM-SS scheme for a given data rate. On the other hand, LDPC code is widely used to the latest wireless communication systems as forward error correction (FEC) scheme and has Shannon-limit approaching performance. Therefore, by applying LDPC code to IM-OFDM-QOS system as FEC scheme, the reception performance can be further improved. Simulation results show that significant signal-to-noise ratio (SNR) gains can be obtained for LDPC coded IM-OFDM-QOS system compared to the LDPC coded IM-OFDM-SS system and the SNR gain increases with the higher code rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.4C
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• pp.370-378
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• 2007

The most appropriate low density parity check (LDPC) code for hybrid automatic repeat request (HARQ) system suitable for future multimedia communication systems is presented in this paper. HARQ system with punctured LDPC code is investigated at first. And two transmission schemes with parallel concatenated LDPC code are also presented and their performances are analyzed according to the various values of mean column weight (MCW). As a result, the parallel concatenated LDPC code with the diversity effect of information bit is considered to be more appropriate for HARQ system considering the throughput as well as error performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.8
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• pp.637-642
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• 2014

In this paper, we propose a efficient shift index searching algorithm for design of the block LDPC codes. It is combined with the message-passing based cycle search algorithm and ACE algorithm. We can determine the shift indices by ordering of priority factors which are effect on the LDPC code performance. Using this algorithm, we can construct the LDPC codes with low complexity compare to trellis-based search algorithm and save the memory for storing the parity check matrix.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.28-38
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• 2013

In this paper, we propose a improved turbo equalizer which generates a feedback signal through a simple calculation to improve performance in single carrier system with the LMS(least mean square) algorithm based equalizer and LDPC(low density parity check) codes. LDPC codes can approach the Shannon limit performance closely. However, computational complexity of LDPC codes is greatly increased by increasing the repetition of the LDPC codes and using a long parity check matrix in harsh environments. Turbo equalization based on LDPC code is used for improvement of system performance. In this system, there is a disadvantage of very large amount of computation due to the increase of the repetition number. To less down the amount of this complicated calculation, The proposed improved turbo equalizer adjusts the adoptive equalizer after the soft decision and the LDPC code. Through the simulation results, it's confirmed that performance of improved turbo equalizer is close to the SISO-MMSE(soft input soft output minimum mean square error) turbo equalizer based on LDPC code with the smaller amount of calculation.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.3
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• pp.210-219
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• 2017

This paper proposes a modified min-max algorithm (MMMA) for nonbinary quasi-cyclic low-density parity-check (NB-QC-LDPC) codes and an efficient parallel block-layered decoder architecture corresponding to the algorithm on a graphics processing unit (GPU) platform. The algorithm removes multiplications over the Galois field (GF) in the merger step to reduce decoding latency without any performance loss. The decoding implementation on a GPU for NB-QC-LDPC codes achieves improvements in both flexibility and scalability. To perform the decoding on the GPU, data and memory structures suitable for parallel computing are designed. The implementation results for NB-QC-LDPC codes over GF(32) and GF(64) demonstrate that the parallel block-layered decoding on a GPU accelerates the decoding process to provide a faster decoding runtime, and obtains a higher coding gain under a low $10^{-10}$ bit error rate and low $10^{-7}$ frame error rate, compared to existing methods.

• Journal of Communications and Networks
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• v.16 no.3
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• pp.249-257
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• 2014

This paper presents methods to the construction of regular and irregular low-density parity-check (LDPC) codes based on Euclidean geometries over the Galois field. Codes constructed by these methods have quasi-cyclic (QC) structure and large girth. By decomposing hyperplanes in Euclidean geometry, the proposed irregular LDPC codes have flexible column/row weights. Therefore, the degree distributions of proposed irregular LDPC codes can be optimized by technologies like the curve fitting in the extrinsic information transfer (EXIT) charts. Simulation results show that the proposed codes perform very well with an iterative decoding over the AWGN channel.

• Journal of Communications and Networks
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• v.17 no.4
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• pp.351-361
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• 2015

In this paper, a new decoding scheme is proposed to improve the error correcting performance of low-density parity-check (LDPC) codes in high signal-to-noise ratio (SNR) region by using post-processing. It behaves as follows: First, a conventional LDPC decoding is applied to received LDPC codewords one by one. Then, we count the number of word errors in a predetermined number of decoded codewords. If there is no word error, nothing needs to be done and we can move to the next group of codewords with no delay. Otherwise, we perform a proper post-processing which produces a new soft-valued codeword (this will be fully explained in the main body of this paper) and then apply the conventional LDPC decoding to it again to recover the unsuccessfully decoded codewords. For the proposed decoding scheme, we adopt a simple product code structure which contains LDPC codes and simple algebraic codes as its horizontal and vertical codes, respectively. The decoding capability of the proposed decoding scheme is defined and analyzed using the parity-check matrices of vertical codes and, especially, the combined-decodability is derived for the case of single parity-check (SPC) codes and Hamming codes used as vertical codes. It is also shown that the proposed decoding scheme achieves much better error correcting capability in high SNR region with little additional decoding complexity, compared with the conventional LDPC decoding scheme.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.771-774
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• 2010

In this paper, BER performance of LDPC(Low-Density Parity-Check) decoder for WiMAX is analyzed, and optimal design conditions of LDPC decoder are derived. The min-sum LDPC decoding algorithm which is based on an approximation of LLR sum-product algorithm is modeled and simulated by Matlab, and it is analyzed that the effects of LLR approximation bit-width and maximum iteration cycles on the bit error rate(BER) performance of LDCP decoder. The parity check matrix for IEEE 802.16e standard which has block length of 2304 and code rate of 1/2 is used, and AWGN channel with QPSK modulation is assumed. The simulation results show that optimal BER performance is achieved for 7 iteration cycles and LLR bit-width of (8,6).