• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.88-90
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• 2012

A study on an integrated single stage AC/DC converter is presented in this paper. The input current can be controlled by the auxiliary winding($L_{aux}$), auxiliary primary winding($N_3$), and the boost inductor($L_B$) which are designed to operate in discontinuous conduction mode(DCM) to reduced the total harmonic distortion(THD) of input current. The auxiliary primary winding($N_3$) is critically selected in order to compress the input capacitor voltage($V_{in}$) as well as to reduce the current stress of the switch(Q). Low total harmonic distortion(THD), low input voltage($V_{in}$) in universal input voltage($V_{AC}$), low current stress at the switching device and high efficiency are the main consideration keys in this design to achieve high performance system with low cost of single stage AC/DC converter. A 30W single stage AC/DC prototype converter is under study.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1137-1149
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• 2017

In order to reduce the cost, improve the efficiency and simplify the complicated control of existing isolated LED drivers, an improved boundary conduction mode (BCM) Buck ac-dc light emitting diode (LED) driver with extended output voltage and low total harmonic distortion is proposed. With a coupled inductor winding and a stacked output, its output voltage can be elevated to a much higher value when compared to that of the conventional Buck ac-dc converter, without sacrificing the input harmonics and power factor. Therefore, the proposed Buck LED driver can meet the IEC61000-3-2 (Class C) limitation and has a low THD. The operating principle of the topology and the design methodology of the ac-dc LED driver are presented. A 150 W ac-dc prototype was built in the laboratory and it shows that the input current harmonics meet the lighting standard. In addition, the THD is less than 16% at a typical ac input. The peak efficiency is higher than 96.5% at a full load and a normal input.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1407-1414
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• 2016

Unlike existing pulse-width modulation (PWM) techniques, such as sinusoidal PWM and random PWM, the wavelet PWM (WPWM) technique based on a Harr wavelet function can achieve a high fundamental component for the output voltage, low total harmonic distortion, and simple digital implementation. However, the original WPWM method lacks output voltage control. Thus, the practical application of the WPWM technique is limited. This study proposes an improved WPWM technique that can regulate output voltage amplitude with the addition of a parameter. The relationship between the additional parameter and the output voltage amplitude is analyzed in detail. Experimental results verify that the improved WPWM exhibits output voltage control in addition to all the merits of the WPWM technique.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.3
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• pp.366-371
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• 2012

In this paper, we propose an electric circuit using one common-arm of H-Bridge inverters to reduce the number of switching components in the multi-level inverter combined with H-Bridge inverters and transformers. And furthermore, we suggested a new multi-level PWM inverter using PWM level to reduce THD (Total Harmonic Distortion). We use a phase-shift switching method that has the same rate of usage at each transformer. Also, we test the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of the control signal for the proposed multi-level PWM inverter.

• Journal of Electrical Engineering and Technology
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• v.8 no.6
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• pp.1328-1336
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• 2013

Nowadays multilevel inverters are developing generally due to reduced voltage stress on power switches and low total harmonic distortion (THD) in output voltage. However, for increasing the output voltage levels the number of circuit devices are increased and it results in increasing the cost of converter. In this paper, a novel multilevel inverter is proposed. The suggested topology uses less number of power switches and related gate drive circuits to generate the same level in output voltage with comparison to traditional cascaded multilevel inverter. With the proposed topology all levels in output voltage can be realized. As an illustration, a symmetric 13-level and asymmetric 29-level proposed inverters have been simulated and implemented. The total peak inverse (PIV) and power losses of presented inverter are calculated and compared with conventional cascaded multilevel inverter. The presented analyses show that the power losses in the suggested multilevel inverter are less than the traditional inverters. Presented simulation and experimental results demonstrate the feasibility and applicability of the proposed inverter to obtain the maximum number of levels with less number of switches.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1484-1494
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• 2017

We present a two-stage inverter with high step-up conversion ratio engaging modified finite-set Model Predictive Control (MPC) for utility-integrated photovoltaic (PV) applications. The anticipated arrangement is fit for low power PV uses, the calculated efficiency at 150 W input power and 19 times boosting ratio was around 94%. The suggested high-gain dc-dc converter based on Cockcroft-Walton multiplier constitutes the first-stage of the offered structure, due to its high step-up ability. It can boost the input voltage up to 20 times. The 3S current-source inverter constitutes the second-stage. The 3S current-source inverter hires three semiconductor switches, in which one is functioning at high-frequency and the others are operating at fundamental-frequency. The high-switching pulses are varied in the procedure of unidirectional sine-wave to engender a current coordinated with the utility-voltage. The unidirectional current is shaped into alternating current by the synchronized push-pull configuration. The MPC process are intended to control the scheme and achieve the subsequent tasks, take out the Maximum Power (MP) from the PV, step-up the PV voltage, and introduces low current with low Total Harmonic Distortion (THD) and with unity power factor with the grid voltage.

• Journal of the Korean Society of Safety
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• v.20 no.3 s.71
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• pp.47-52
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• 2005

Recently, power conversion equipment increased rapidly makes a lot of harmonics. Thus, it is growing that wrong operation and break down of sensitive devices. There are two kinds of causes of harmonics. One of them is lots of power conversion equipment as modem controller, inverter, converter and SWS(Switching Mode Power Supply). Another is nonlinear operating machines as transformer and motor. The more nonlinear loads like them grow, the more serious problems as harmonic current to source and low power factor because of increasing reactive power grow. It is installed for reactor and L-C Filter to decrease harmonic in general. This paper analysis and compares two of characteristics and harmonic from reactor and L-C Filter with operation of induction motor and power conversion equipment. In the result, L-C Filter more improves unbalance rate and THD than reactor.

• Journal of Power Electronics
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• v.19 no.2
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• pp.413-430
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• 2019

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.4
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• pp.397-402
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• 2013

This paper proposes a new passive type LED driver which satisfies the standard of power factor (PF) and total harmonic distortion (THD). The proposed passive LED driver also has high-efficiency and long-life time characteristics compared to active LED driver which is composed of op-amp, switches and so on. By using just passive components such as inductor, capacitor, and diode, it has resolved extremely short-life time and low-efficiency problems of previous LED drivers. It has achieved PF of 0.99, THD of 16.4 %, and the total efficiency of 95 %. The proposed passive LED driver is fully analyzed and verified by simulations and experiments, which results are in good agreement each other.