• Journal of Power Electronics
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• 제14권2호
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• pp.226-236
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• 2014

A new active LED driver with high power factor (PF) and low total harmonic distortion (THD) compatible with a rapid-start ballast is proposed. An LC input filter is attached to the ballast to increase PF and reduce THD. A boost converter is then installed to regulate the LED current, where an unstable operating region has been newly identified. The unstable region is successfully stabilized by feedback control with two zeroes. The extremely high overall system of the 10th order is completely analyzed by the newly introduced phasor transformed circuits in static and dynamic analyses. Although a small DC capacitor is utilized, the flicker percentage of the LED is drastically mitigated to 1% by the fast controller. The proposed LED driver that employs a simple controller with a start-up circuit is verified by extensive experiments whose results are in good agreement with the design.

• Journal of Power Electronics
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• 제13권4호
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• pp.712-718
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• 2013

This paper proposes a control method for reducing the total harmonic distortion (THD) of the grid current of three-phase grid-connected inverter systems when the grid voltage is distorted. The THD of the grid current caused by grid voltage harmonics is derived by considering the phase delay and magnitude attenuation due to the hardware low-pass filter (LPF). The Cauchy-Schwarz inequality theory is used in order to search more easily for the minimum point of the THD. Both the gain and angle of the compensation voltage at the minimum point of the THD of the grid current are derived with the variation of cut-off frequencies of the hardware LPF. Simulation and experimental results show the validity of the proposed control methods.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.144-146
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• 2018

In order to meet the harmonics standards such as IEEE 519 and P1547 the output quality of a grid connected inverter should satisfy a certain level of Total Harmonic Distortion (THD) value. However, the output quality of an inverter gets degraded due to the grid voltage harmonics, the dead time effects and the nonlinearity of the switches, which all contributes to a higher THD value of the output. In order to meet the required THD value for the inverter output under the distorted grid condition the use of harmonic controller is essential. In this paper a novel feedforward harmonic compensation method is proposed in order to effectively eliminate the low order harmonics in the inverter current to the grid. In the proposed method, unlike the conventional harmonic control methods, the hamonic components are directly compensated by the feedforward terms generated by the PR controller with the grid current in the stationary frame. The proposed method is simple in implementation but powerful in eliminating the harmonics from the output. The effectiveness of proposed method is verified through the PSIM simulation and the experiments with a 5kW single phase grid connected inverter.

• 전력전자학회논문지
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• 제24권3호
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• pp.215-227
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• 2019

Grid-connected inverters should satisfy a certain level of total harmonic distortion (THD) to meet harmonics standards, such as IEEE 519 and P1547. The output quality of an inverter is typically degraded due to grid voltage harmonics, dead time effects, and the device's turn-on/turn-off delay, which all contribute to increasing the THD value of the output. The use of a harmonic controller is essential to meet the required THD value for inverter output under a distorted grid condition. In this study, an improved feedforward harmonic compensation method is proposed to effectively eliminate low-order harmonics in the inverter current to the grid. In the proposed method, harmonic components are directly compensated through feedforward terms generated by the proportional resonant controller with the grid current in a stationary frame. The proposed method is simple to implement but powerful in eliminating harmonics from the output. The effectiveness of the proposed method is verified through simulation using PSIM software and experiments with a 5 kW single-phase grid-connected inverter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 A
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• pp.613-615
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• 1996

Harmonic elimination method of using coupling transformer in twelve pulse inverter is presented for high power application. This method is using coupling transformer and PWM(pulse width modulation) switching and voltage source inverter. The object of proposed harmonic elimination method is obtained inverter output of low THD(Total Harmonic Distortion). The simulation results confirm the proposed harmonic elimination method.

• Journal of Power Electronics
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• 제9권4호
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• 전력전자학회논문지
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• 제4권1호
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• pp.82-90
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• 1999

본 논문은 단일 스위치 3상 ZCS 강압형 정류기의 펄스주파수 제어기법을 다루고 있다. 제안하는 펄스주파수 제어방법은 거의 정현적인 입력전류를 흐르게 하여 3상 강압형 정류기의 성능을 보여준다. 제안하는 제어구조의 유용성을 검증해 주는 시뮬레이션과 실험 결과는 단일 스위치 3상 ZCS 강압형 정류기의 고역율, 입력전류의 낮은 THD, 부하 변동에 대한 전압의 응답특성들이 뛰어남을 보여준다.

• Journal of Power Electronics
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• 제19권4호
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• 전력전자학회논문지
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• 제19권1호
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• pp.1-7
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• 2014

This paper proposes a current harmonic compensation method for the grid-connected inverter, especially caused by the grid impedance. Grid impedance causes low order harmonics in the grid current and deteriorates power quality. This paper analyzes the negative impact of the grid impedance, and proposes an active feedforward compensation method. Proposing method verified through simulation and experiment with 3-phase 1.5kW voltage source inverter prototype.