• Title/Summary/Keyword: Low power wide area

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Multi Function IGBT Gate Driver Including Arm Short Protection (Arm Short 보호 기능을 포함한 다기능 IGBT GATE DRIVER)

  • 이경복;조국춘;최종묵
    • Proceedings of the KSR Conference
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    • 2000.05a
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    • pp.202-209
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    • 2000
  • This paper introduces the main function and protection method of IGBT gate driver that designed by KOROS. Recently, the applications of insulated gate bipolar transistors(IGBTs) have expanded widely, particularly in the area of railway converters. This driver is suitable for railway traction applications, so they are designed for circumstance of railway vehicle such as vibration. The input control power for this driver is supplied from battery charger of railway. it is no necessary an isolated power supply board or auxiliary power supply, with substantial savings in cost and space in railway applications. This gate driver can be used wide range of input voltage. So, performance of the driver has no relation with the battery voltage(70V∼110V). The protection methods of IGBT gate driver have many kind of ways, but this gate driver it designed to apply to converter for railway system, so this gate driver includes protection for arm short current and low control power voltage, etc. And the process of protection method and protection reference value are optimized by means of sufficient test with our own facilities.

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A Wide Input Range, 95.4% Power Efficiency DC-DC Buck Converter with a Phase-Locked Loop in 0.18 ㎛ BCD

  • Kim, Hongjin;Park, Young-Jun;Park, Ju-Hyun;Ryu, Ho-Cheol;Pu, Young-Gun;Lee, Minjae;Hwang, Keumcheol;Yang, Younggoo;Lee, Kang-Yoon
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2024-2034
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    • 2016
  • This paper presents a DC-DC buck converter with a Phase-Locked Loop (PLL) that can compensates for power efficiency degradation over a wide input range. Its switching frequency is kept at 2 MHz and the delay difference between the High side driver and the Low side driver can be minimized with respect to Process, Voltage and Temperature (PVT) variations by adopting the PLL. The operation mode of the proposed DC-DC buck converter is automatically changed to Pulse Width Modulation (PWM) or PWM frequency modes according to the load condition (heavy load or light load) while supporting a maximum load current of up to 1.2 A. The PWM frequency mode is used to extend the CCM region under the light load condition for the PWM operation. As a result, high efficiency can be achieved under the light load condition by the PWM frequency mode and the delay compensation with the PLL. The proposed DC-DC buck converter is fabricated with a $0.18{\mu}m$ BCD process, and the die area is $3.96mm^2$. It is implemented to have over a 90 % efficiency at an output voltage of 5 V when the input range is between 8 V and 20 V. As a result, the variation in the power efficiency is less than 1 % and the maximum efficiency of the proposed DC-DC buck converter with the PLL is 95.4 %.

Design of a Wide-Frequency-Range, Low-Power Transceiver with Automatic Impedance-Matching Calibration for TV-White-Space Application

  • Lee, DongSoo;Lee, Juri;Park, Hyung-Gu;Choi, JinWook;Park, SangHyeon;Kim, InSeong;Pu, YoungGun;Kim, JaeYoung;Hwang, Keum Cheol;Yang, Youngoo;Seo, Munkyo;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.1
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    • pp.126-142
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    • 2016
  • This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal $S_{22}$ and $S_{11}$ matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in $0.13{\mu}m$, 1-poly, 6-metal CMOS technology. The die area of the transceiver is $4mm{\times}3mm$. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is +10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.

An Active Voltage Doubling Rectifier with Unbalanced-Biased Comparators for Piezoelectric Energy Harvesters

  • Liu, Lianxi;Mu, Junchao;Yuan, Wenzhi;Tu, Wei;Zhu, Zhangming;Yang, Yintang
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1226-1235
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    • 2016
  • For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm2, while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

Analysis of Computer Simulated and Field Experimental Results of LoRa Considering Path Loss under LoS and NLoS Environment (LoS 및 NLoS 환경에서의 경로 손실을 고려한 LoRa의 모의실험 및 실측 결과 분석)

  • Yi, Dong Hee;Kim, Suk Chan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.2
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    • pp.444-452
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    • 2017
  • Recently, a demand of Internet-of-things (IoT) rises dramatically and an interest in Low Power Wide Area (LPWA) grows larger accordingly. In this paper, performance in LoRa which is included in LPWA standard is analyzed. Particularly, after measuring Received Signal Strength Indication (RSSI) of received signal on Line-of-sight (LoS) and Non-line-of-sight (NLoS) environment and it is compared with RSSI which theoretical path loss model is applied to. Among many path loss models, the simulation for theoretical RSSI use Log-distance, Two-ray model and Okumura-Hata model that is based on the test database. Consequently, the result of Okumura-Hata model is the most similar with the measured RSSI. When a network based on LoRa is built, this result can used to decide optimal node arrangement.

A 6b 1.2 GS/s 47.8 mW 0.17 mm2 65 nm CMOS ADC for High-Rate WPAN Systems

  • Park, Hye-Lim;Kwon, Yi-Gi;Choi, Min-Ho;Kim, Young-Lok;Lee, Seung-Hoon;Jeon, Young-Deuk;Kwon, Jong-Kee
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.2
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    • pp.95-103
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    • 2011
  • This paper proposes a 6b 1.2 GS/s 47.8 mW 0.17 $mm^2$ 65 nm CMOS ADC for high-rate wireless personal area network systems. The proposed ADC employs a source follower-free flash architecture with a wide input range of 1.0 $V_{p-p}$ at a 1.2 V supply voltage to minimize power consumption and high comparator offset effects in a nanometer CMOS technology. The track-and-hold circuits without source followers, the differential difference amplifiers with active loads in pre-amps, and the output averaging layout scheme properly handle a wide-range input signal with low distortion. The interpolation scheme halves the required number of pre-amps while three-stage cascaded latches implement a skew-free GS/s operation. The two-step bubble correction logic removes a maximum of three consecutive bubble code errors. The prototype ADC in a 65 nm CMOS demonstrates a measured DNL and INL within 0.77 LSB and 0.98 LSB, respectively. The ADC shows a maximum SNDR of 33.2 dB and a maximum SFDR of 44.7 dB at 1.2 GS/s. The ADC with an active die area of 0.17 $mm^2$ consumes 47.8 mW at 1.2 V and 1.2 GS/s.

Design and Implementation of Distributed Parking Space Management Service in Scalable LPWA-Based Networks (대규모 LPWA기반 네트워크에서 분산된 주차 공간 관리서비스의 설계 및 구현)

  • Park, Shinyeol;Jeong, Jongpil;Park, Dongbeom;Park, Byungjun
    • KIPS Transactions on Computer and Communication Systems
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    • v.7 no.10
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    • pp.259-268
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    • 2018
  • Due to the development of cities and the increase of vehicles, effective control of parking space management service in cities is needed. However, the existing parking lot management system does not provide limited or convenient service in terms of space and time. In this paper, we propose distributed parking space management service based on large scale LPWA (Low-Power Wide-Area). The parking sensor collects parking space information from the parking lot and is transmitted over a low-power wide network. All parking data is processed and analyzed in the IoT cloud. Through a parking space management service system in all cities, users are given the temporal convenience of determining the parking space and the area efficiency of the parking space.

LoRa LPWAN Sensor Network for Real-Time Monitoring and It's Control Method (실시간 모니터링을 위한 LoRa LPWAN 기반의 센서네트워크 시스템과 그 제어방법)

  • Kim, Jong-Hoon;Park, Won-Joo;Park, Jin-Oh;Park, Sang-Hyun
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.31 no.6
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    • pp.359-366
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    • 2018
  • Social infrastructure facilities that have been under construction since the country's high-growth period are undergoing rapid aging, and safety assessments of large structures such as bridge tunnels, which can be directly linked to large-scale casualties in the event of an accident, are necessary. Wireless smart sensor networks that improve SHM(Structural Health Monitoring) based on existing wire sensors are difficult to construct economical and efficient system due to short signal reach. The LPWAN, Low Power Wide Area Network, is becoming popular with the Internet of Things and it is possible to construct economical and efficient SHM by applying it to structural health monitoring. This study examines the applicability of LoRa LPWAN to structural health monitoring and proposes a channel usage pre-planning based LoRa network operation method that can efficiently utilize bandwidth while resolving conflicts between channels caused by using license - exempt communication band.

PCB Pattern Antenna of 920 MHz Band for Marine IoT Services (해양 IoT 서비스를 위한 920 MHz 대역의 PCB 패턴 안테나)

  • Lee, Seong-Real
    • Journal of Advanced Navigation Technology
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    • v.23 no.5
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    • pp.430-436
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    • 2019
  • It is needed to develop an antenna with features of subminiature, light weight and multi-band operation for the variaty services in maritime and industrial fields. The PCB pattern antenna is one of the appropreiate antennas solving these requirements. In this research, the design and fabrication of the PCB pattern antenna operating on the single band of 920 MHz are investigated. The final goal is that the development of the dual band PCB pattern antenna operating on 260 MHz and 920 MHz, which is based on the proposed antenna. It is evident that the performance in the frequencies of 902 MHz, 915 MHz and 928 MHz among of 920 MHz ISM band is better than that in other frequencies. It is also confirmed that the differences of the voltage standing wave ratio, return loss, gain and efficiency between three frequencies are less than 5%. It is expected that the development of communication link of 5-10 km is possible when the induced results are applied into the low power wide area (LPWA) network desinged by the rule of -30 dB sensitivity.

920 MHz Band Antenna for Marine Buoy (해양 부이용 920 MHz 대역 안테나)

  • Choi, Hyung-dong;Kim, Sung-yul;Lee, Seong-Real
    • Journal of Advanced Navigation Technology
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    • v.24 no.6
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    • pp.593-600
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    • 2020
  • The equipment for marine IoT service have to overcome the effect of seawater. Furthermore, the free floating transmitter in seawater will be less affected by the seawater environment. The results of the design and fabrication of antenna, which is embedded in buoy, are shown in this research. The proposed antenna is used to supervise the states of fishing gears in monitoring system for real-name system of electric fishing gear. The selected frequency band of the proposed antenna is 920 MHz, and PCB pattern type is selected for subminiature and light weight. It is confirmed that RF characteristics is more degraded, however, the radiation is gradually upward as the contact surface of buoy with seawater is more broaden through the simulation results. That is, the RF performance of the proposed antenna is more deteriorated but beam radiation characteristics is more suited the marine IoT, the seawater effect is more increased. It is expected that the proposed antenna will contribute the implementation of IoT network based on low power wide area (LPWA) when the degradation of RF performance will be settled.