• 제목/요약/키워드: Low power operation

검색결과 1,992건 처리시간 0.032초

부하역률 감도기법 적용에 의한 전력시스템의 경제운용 측면에서의 역률개선 방안 연구 (A Study on Enhancing the Load Power Factor from the Point of View of Economic Operation Using the Load Power Factor Sensitivity Method)

  • 이병하;김정훈
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2004년도 하계학술대회 논문집 A
    • /
    • pp.153-155
    • /
    • 2004
  • Various problems such as the increase of the power loss and the voltage instability may often occur in the case of low load power factor. The demand of reactive power increases continuously with the growth of active power and the restructuring of electric power companies makes the integrated management of ractive power a troublesome problem, so that the systematic control of load power factor is required. In this paper, the load power factor sensitivity of the generation cost is used for determining the locations of reactive power compensation devices effectively and for enhancing the load power factor appropriately. In addition, the integrated costs are used for determining the value of the load power factor from the point of view of the economic operation. It is shown through the application to a large-scale power system that the system power factor can be enhanced effectively and appropriately using the load power factor sensitivity and integrated costs.

  • PDF

실계통 운전경험에 따른 아몰퍼스 변압기의 제조 및 운영방안 (Manufacturing and operation experiance of Amorphous Alloy Gore Transformer)

  • 정영호
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1998년도 하계학술대회 논문집 A
    • /
    • pp.110-112
    • /
    • 1998
  • Some recomendations for the manufacturing, operation and maintanance of amorphous alloy core transformer are presented through the operation experiance. Transformers on trouble was taken to pieces and tested from a viewpoint of durability, and low loss characteristics.

  • PDF

DSP를 위한 새로운 저전력 상위 레벨 합성 (A New Low Power High Level Synthesis for DSP)

  • 한태희;김영숙;인치호;김희석
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
    • /
    • pp.101-104
    • /
    • 2002
  • This paper propose that is algorithm of power dissipation reduction in the high level synthesis design for DSP(Digital Signal Processor), as the portable terminal system recently demand high power dissipation. This paper obtain effect of power dissipation reduction and switching activity that increase correlation of operands as input data of function unit. The algorithm search loop or repeatedly data to the input operands of function unit. That can be reduce the power dissipation using the new low power high level synthesis algorithm. In this Paper, scheduling operation search same nodes from input DFG(Data Flow Graph) with correlation coefficient of first input node and among nodes. Function units consist a multiplier, an adder and a register. The power estimation method is added switching activity for each bits of nodes. The power estimation have good efficient using proposed algorithm. This paper result obtain more Power reduction of fifty percents after using a new low power algorithm in a function unit as multiplier.

  • PDF

저전력 VLIW 명령어 추출을 위한 연산재배치 기법 (Operation Rearrangement for Low-Power VLIW Instruction Fetches)

  • 신동군;김지홍
    • 한국정보과학회논문지:시스템및이론
    • /
    • 제28권10호
    • /
    • pp.530-540
    • /
    • 2001
  • 이동용 응용프로그램이 요구하는 계산량이 늘어남에 따라 많은 이동용 컴퓨터시스템이 성능을 높이기위해 VLIW 프로세서를 사용하여 설계되고 있다. VLIW 구조에서는 하나의 명령어(instruction)가 여러개의 연산(operation)을 가지고 있는데, 이들이 명령어안에서 어떻게 배치되는냐에 따라 명령어 추출(fetch)시의전력 소모가 큰 차이를 보인다. 본 논문에서는 저전력 VLIW 명령어 추출을 위해 컴파일어의 후단계로 사용되는 최적의 연산 재배치 기법을 제시한다. 제안된 방법은 연속적인 명령어 추출시의 스위칭 활동(switching activity)이 최소화가 되도록 연산의 순서를 수정한다. 벤치마크 프로그램에 대해 실험해 본 결과, 제안된 기법을 사용하여 명령어를 재배치하는 경우 명령어 추출시 스위칭 활동이 평균적으로 약 34%줄어듬을 확인하였다.

  • PDF

DRAM 의 저전력 구현을 위한 안정한 기판전압 발생기 설계에 관한 연구 (A study on the Design of a stable Substrate Bias Generator for Low power DRAM's)

  • 곽승욱;성양현곽계달
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 1998년도 추계종합학술대회 논문집
    • /
    • pp.703-706
    • /
    • 1998
  • This paper presents an efficient substrate-bias generator(SBG)for low-power, high-density DRAM's The proposed SBG can supply stable voltage with switching the supply voltage of driving circuit, and it can substitude the small capacitance for the large capacitance. The charge pumping circuit of the SBG suffere no VT loss and is to be applicable to low-voltage DRAM's. Also it can reduce the power consumption to make VBB because of it's high pumping efficiency. Using biasing voltage with positive temperature coefficient, VBB level detecting circuit can detect constant value of VBB against temperature variation. VBB level during VBB maintaining period varies 0.19% and the power dissipation during this period is 0.16mw. Charge pumping circuit can make VBB level up to -1.47V using VCC-1.5V, and do charge pumping operation one and half faster than the conventional ones. The temperature dependency of the VBB level detecting circuit is 0.34%. Therefore the proposed SBG is expected to supply a stable VBB with less power consumption when it is used in low power DRAM's.

  • PDF

저 출력시 증기발생기 수위의 자동제어논리 개발 (Development of an automatic steam generator level control logic at low power)

  • 한재복;정시채;유준
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
    • /
    • pp.601-604
    • /
    • 1996
  • It is well known that steam generator water level control at low power operation has many difficulties in a PWR (pressurized water reactor) nuclear power plant. The reverse process responses known as shrink and swell effects make it difficult to control the steam generator water level at low power. A new automatic control logic to remove the reverse process responses is proposed in this paper. It is implemented in PLC (programmable logic controller) and evaluated by using test equipment in Korea Atomic Energy Research Institute. The simulation test shows that the performance requirements is met at low power (below 15%). The water level control by new control logic is stabilized within 1% fluctuation from setpoint, while the water level by YGN 3 and 4 control logic is unstable with the periodic fluctuation of 25% magnitude at 5% power.

  • PDF

스위칭 엑티비티를 최소화한 저전력 DCT 아키텍쳐 구현 (Low-Power DCT Architecture by Minimizing Switching Activity)

  • 김산;박종수;이용석
    • 한국정보처리학회:학술대회논문집
    • /
    • 한국정보처리학회 2005년도 춘계학술발표대회
    • /
    • pp.863-866
    • /
    • 2005
  • Low-power design is one of the most important challenges encountered in maximizing battery life in portable devices as well as saving energy during system operation. In this paper we propose a low-power DCT (Discrete Cosine Transform) architecture using a modified Computation Sharing Multiplication (CSHM). The overall rate of power consume is reduced during DCT: the proposed architecture does not perform arithmetic operations on unnecessary bits during the Computation Sharing Multiplication calculations. Experimental results show that it is possible to reduce power dissipation up to about $7{\sim}8%$ without compromising the final DCT results. The proposed lowpower DCT architecture can be applied to consumer electronics as well as portable multimedia systems requiring high throughput and low-power.

  • PDF

대기전력저감을 위한 플라이백컨버터 (A Novel Flyback Converter for Low Standby Power Consumption)

  • 정봉근;장상호;김은수;최문기;계문호
    • 전력전자학회논문지
    • /
    • 제14권4호
    • /
    • pp.299-306
    • /
    • 2009
  • 최근 대기전력저감기능을 갖는 PWM IC를 적용한 플라이백 컨버터는 대기전력 모드 시 Burst 스위칭 동작에 의해 전력소모를 최소화 할 수 있지만 경 부하 및 대기전력모드 시 변압기를 통해 흐르는 큰 자화전류에 의해 여전히 낮은 효율특성을 가지는 문제점이 있었다. 본 논문에서는 경 부하 및 대기전력모드 동작 시 자화전류를 최 소화함으로 효율을 개선한 회로를 제안하였으며 50인치 PDP TV PSU (Power Supply Unit)에 있어서 대기전력 및 보조전원으로 사용된 70W 플라이백 컨버터에 적용 실험하여 보았다.

배터리 충전을 위한 소형풍력 발전 시스템의 병렬 운전방안에 관한 연구 (A Study on the Parallel Operation Strategy of Small Wind Turbine System for Battery Charging)

  • 손영득;구현근;김장목
    • 전력전자학회논문지
    • /
    • 제19권6호
    • /
    • pp.549-556
    • /
    • 2014
  • This study proposes a parallel operation strategy for small wind turbine systems. A small wind turbine system consists of blade, permanent magnet synchronous generator, three-phase diode rectifier, DC/DC buck converter, and the battery load. This configuration has reliability, simple control algorithm, high efficiency, and low cost. In spite of these advantages, the system stops when unexpected failures occur. Possible failures can be divided into mechanical and electrical parts. The proposed strategy focuses on the failure of electrical parts, which is verified by numerical analysis through equivalent circuit and acquired general formula of small wind power generation systems. Simulation and experimental results prove its efficiency and usefulness.

ACCELEROMETER SELECTION CONSIDERATIONS Charge and Integral Electronic Piezo Electric

  • Lally, Jim
    • 한국소음진동공학회:학술대회논문집
    • /
    • 한국소음진동공학회 2004년도 춘계학술대회논문집
    • /
    • pp.1047-1051
    • /
    • 2004
  • Charge amplifier systems benefit from the very wide dynamic range of PE accelerometers by offering flexibility in adjusting the electrical output characteristics such as sensitivity and range. They are well suited for operation at high temperatures. Modern charge systems feature improved low noise operation, simplified digital controls, and dual mode operation for operation with charge or IEPE voltage mode sensors. high impedance circuitry is not well suited for operation in adverse field or factory environments. The resolution of a PE accelerometer may not be specified or known since noise is a system consideration determined by cable length and amplifier gain. IEPE accelerometrs operate from a constant current power source, provide a high-voltage, low-impedance, fixed mV/g output. They operate through long, ordinary, coaxial cable in adverse environments without degradation of signal quality. They have limited high temperature range. IEPE sensors are simple to operate. Both resolution and operating range are defined specifications. Cost perchannel is lower compared to PE systems since low-noise cable and charge amplifiers are not required.

  • PDF