• Title/Summary/Keyword: Low operation voltage

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A Seamless Control Method for Supercapacitor to Compensate Pulse Load Transients in DC Microgrid

  • Dam, Duy-Hung;Lee, Hong-Hee
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.198-199
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    • 2017
  • This paper proposed a new control method for supercapacitor (SC) to compensate the pulse load transient and enhance the power quality of dc microgrid. By coordinating the operation frequency, the supercapacitor is controlled to handle the surge current component while the low-frequency current component is dealt with by remaining sources in the system. Based on the state of charge and dc bus voltage level, the SC unit operation mode is automatically decided. Meanwhile, the dc bus voltage level indicates the power demand of the whole system; by regulating the dc bus voltage, the mismatch of power demand is covered by SC unit. The effectiveness of proposed method is verified by experiment prototype formed by two distributed generation and one supercapacitor unit.

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A Novel ZVS 3-Level Resonant Pole Inverter (새로운 ZVS 3-레벨 공진폴 인버터)

  • Baek, Ju-W.;Cho, Jung-G.;Yoo, Dong-W.;Song, Doo-I.;Won, Cung-Y.
    • Proceedings of the KIEE Conference
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    • 1995.07a
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    • pp.360-364
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    • 1995
  • A zero voltage switching (ZVS) three level resonant pole inverter is presented for high power GTO inverters. The concept of auxiliary resonant commutated pole(ARCP) for two level inverter is extended to the three level inverter. The proposed auxiliary commutation circuit consists of one resonant inductor and two bi-directional switches, which provides ZVS condition to the main devices without increasing device voltage or current stresses. The auxiliary device operates with zero current switching(ZCS) which enables use of the low cost thyristors. The proposed circuit can handle higher voltage and higher power(1-10MVA) comparing to the two level one. Operation and analysis of the proposed circuit are illustrated. Experimental results with 10 KW, 4 kHz prototype are presented to verify the principle of operation.

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Electrical characteristics of lateral poly0silicon field emission triode using LOCOS process

  • Lee, Jae-Hoon;Lee, Myoung-Bok;Park, Dong-Il;Ham, Sung-Ho;Lee, Jong-Hyun;Lee, Jung-Hee
    • Journal of Korean Vacuum Science & Technology
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    • v.3 no.1
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    • pp.38-42
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    • 1999
  • Using the LOCOS process, we have fabricated the lateral type polysilicon field emission triodes with poly-Si/oxide/Si structure and investigated their current-voltage characteristics for three biasing modes of operation. The fabricated devices exhibit excellent electrical performances such as a relatively low turn-on anode voltage of 14 V at VGC = 0V, a stable and high emission current of 92${\mu}$A/triode over 90 hours, a small gate leakage current of 0.23 ${\mu}$A/triode and an outstanding transconductance of 57${\mu}$S/5triodes at VGC = 5V and VAC = 26V. these superior electrical operation is believed to be due to a large field enhancement effect, which is related to the sharp cathode tips produced by the LOCOS process as well as the high aspect ratio (height /radius ) of the cathode tip end.

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Evaluation of a Self-Adaptive Voltage Control Scheme for Low-Power FPGAs

  • Ishihara, Shota;Xia, Zhengfan;Hariyama, Masanori;Kameyama, Michitaka
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.3
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    • pp.165-175
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    • 2010
  • This paper presents a fine-grain supply-voltage-control scheme for low-power FPGAs. The proposed supply-voltage-control scheme detects the critical path in real time with small overheads by exploiting features of asynchronous architectures. In an FPGA based on the proposed supply-voltage-control scheme, logic blocks on the sub-critical path are autonomously switched to a lower supply voltage to reduce the power consumption without system performance degradation. Moreover, in order to reduce the overheads of level shifters used at the power domain interface, a look-up-table without level shifters is employed. Because of the small overheads of the proposed supply-voltage-control scheme and the power domain interface, the granularity size of the power domain in the proposed FPGA is as fine as a single four-input logic block. The proposed FPGA is fabricated using the e-Shuttle 65 nm CMOS process. Correct operation of the proposed FPGA on the test chip is confirmed.

Family of Dual-Input Dual-Buck Inverters Based on Dual-Input Switching Cells

  • Yang, Fan;Ge, Hongjuan;Yang, Jingfan;Dang, Runyun;Wu, Hongfei
    • Journal of Power Electronics
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    • v.18 no.4
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    • pp.1015-1026
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    • 2018
  • A family of dual-DC-input (DI) dual-buck inverters (DBIs) is proposed by employing a DI switching cell as the input of traditional DBIs. Three power ports, i.e. a low voltage DC input port, a high voltage DC input port and an AC output port, are provided by the proposed DI-DBIs. A low voltage DC source, whose voltage is lower than the peak amplitude of the AC side voltage, can be directly connected to the DI-DBI. This supplies power to the AC side in single-stage power conversion. When compared with traditional DBI-based two-stage DC/AC power systems, the conversion stages are reduced, and the power rating and power losses of the front-end Boost converter of the DI-DBI are reduced. In addition, five voltage-levels are generated with the help of the two DC input ports, which is a benefit in terms of reducing the voltage stresses and switching losses of switches. The topology derivation method, operation principles, modulation strategy and characteristics of the proposed inverter are analyzed in-depth. Experimental results are provided to verify the effectiveness and feasibility of the proposed DI-DBIs.

Improved Current Source using Full-Bridge Converter Type for Thyristor Valve Test of HVDC System (HVDC 시스템의 SCR 사이리스터 밸브 시험을 위한 Full-Bridge Converter 방식의 개선된 전류원 회로)

  • Jung, Jae-Hun;Cho, Han-Je;Goo, Beob-Jin;Nho, Eui-Cheol;Chung, Yong-Ho;Baek, Seung-Taek
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.4
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    • pp.363-368
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    • 2015
  • This paper deals with an improved current source using full-bridge converter type for thyristor valve test of HVDC system. The conventional high-current and low-voltage source of synthetic test circuit requires additional auxiliary power supply to provide the reverse voltage for the auxiliary thyristor valve during turn-off process. The proposed circuit diagram to provide the reverse voltage is extremely simple because no additional component is required. The reverse voltage can be obtained from the input DC voltage of the high-current and low-voltage power supply. The operation principle and design method of the proposed system are described. Simulation and experimental results in scaled down STC of 200 V, 30 A demonstrate the validity of the proposed scheme.

Design of 9 kJ/s High Voltage LiPo Battery based 2-stage Capacitor Charger (배터리 기반 2단 충전 9 kJ/s 고전압 충전기 설계)

  • Cho, Chan-Gi;Jia, Ziyi;Ryoo, Hong-Je
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.4
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    • pp.268-272
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    • 2019
  • A lithium polymer battery-based 9 kJ/s high-voltage capacitor charger, which comprises two stages, is proposed. A modified LCC resonant converter and resonant circuit are introduced at the first and second stages, respectively. In the first stage, the methods for handling low-voltage and high-current batteries are considered. Delta-wye three-phase transformers are used to generate a high output voltage through the difference between the phase and line-to-line voltages. Another method is placing the series resonant capacitor of the LCC resonant components on the transformer secondary side, which conducts considerably low current compared with the transformer primary side. On the basis of the stable operation of the first charging stage, the secondary charging stage generates final output voltage by using the resonance. This additional stage protects the rectifying diodes from the negative voltage when the output capacitor is discharged for a short time. The inductance and capacitance of the resonance components are selected by considering the resonance charging time. The design procedure for each stage with the aforementioned features is suggested, and its performance is verified by not only simulation but also experimental results.

The Sugge Voltage restraint of induction motor using low-loss snubber circuit (저손실 스너버 회로를 이용한 유도전동기의 서지전압 억제)

  • Cho, Man-Chul;Mun, Sang-Pil;Kim, Chil-Yong;Kim, Ju-Yong;Shu, Ki-Young;Kwon, Soon-Kurl
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2007.05a
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    • pp.473-477
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    • 2007
  • The development of advanced Insulated Gate Bipolar Transistor(IGBT)has enabled high-frequency switching operation and has improved the performance of PWM inverters for motor drive. However, the high rate of dv/dt of IGBT has adverse effects on motor insulation stress. In many motor drive applications, the inverter and motor are separated and it requires long motor feds. The long cable contributes high frequency ringing at the motor terminal and it results in hight surge voltage which stresses the motor insulation. The inverter output filter and RDC snubber are conventional method which can reduce the surge voltage. In this paper, we propose the new low loss snubber to reduce the motor terminal surge voltage. The snubber consists of the series connection of charging/discharging capacitor and the voltage-clamped capacitor. At IGBT turn-off, the snubber starts to operate when the IGBT voltage reaches the voltage-clamped level. Since dv/dt is decreased by snubber operating, the peak level of the surge voltage can be reduced. Also the snubber operates at the IGBT voltage above the voltage-clamped level, the snubber loss is largely reduced comparing with RDC snubber. The proposed snubber enables to reduce the motor terminal surge voltage with low loss.

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A CMOS-based Temperature Sensor with Subthreshold Operation for Low-voltage and Low-power On-chip Thermal Monitoring

  • Na, Jun-Seok;Shin, Woosul;Kwak, Bong-Choon;Hong, Seong-Kwan;Kwon, Oh-Kyong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.29-34
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    • 2017
  • A CMOS-based temperature sensor is proposed for low-voltage and low-power on-chip thermal monitoring applications. The proposed temperature sensor converts a proportional to absolute temperature (PTAT) current to a PTAT frequency using an integrator and hysteresis comparator. In addition, it operates in the subthreshold region, allowing reduced power consumption. The proposed temperature sensor was fabricated in a standard 90 nm CMOS technology. Measurement results of the proposed temperature sensor show a temperature error of between -0.81 and $+0.94^{\circ}C$ in the temperature range of 0 to $70^{\circ}C$ after one-point calibration at $30^{\circ}C$, with a temperature coefficient of $218Hz/^{\circ}C$. Moreover, the measured energy of the proposed temperature sensor is 36 pJ per conversion, the lowest compared to prior works.

A study on the transmittance-controlled liquid crystal cell (광 투과도 제어형 액정 셀 연구)

  • Yang, Seong-Soo;Kim, Phil-Jung;Oh, Byeong-Yun
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1224-1229
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    • 2019
  • In this study, a liquid crystal (LC) cell was manufactured for smart window applications, such as blinds, and a system for controlling the light transmission rate was developed. The threshold voltage of the LC cell was 1.325 V and when the transmission rate was 10%, the voltage showed 2.370 V, indicating that the LC cell manufactured is driven at low voltage. The LC cell also operated reliably after being heated for 10 min at 80℃. with a response time of less than 30ms. The operation system designed the applied voltage of the LC cell with a interval of about 0.5 V from 0.15 V to 3.53 V and confirmed that the light transmission rate of the LC varies depending on the actual applied voltage. These results suggest that LC cells are likely to be smart window applications.