• Journal of Power Electronics
• /
• 제12권3호
• /
• pp.377-386
• /
• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• Transactions on Electrical and Electronic Materials
• /
• 제14권5호
• /
• pp.225-230
• /
• 2013

This paper presents a novel shunt radio frequency microelectromechanical system switch on a quartz substrate with stiff ribs around the membrane. The buckling effects in the switch membrane and stiction problem are the primary concerns with RF MEMS switches. These effects can be reduced by the proposed design approach due to the stiffness of the ribs around the membrane. A lower mass of the beam and a reduction in the squeeze film damping is achieved due to the slots and holes in the membrane, which further aid in attaining high switching speeds. The proposed switch is optimized to operate in the k-band, which results in a high isolation of -40 dB and low insertion loss of -0.047 dB at 21 GHz, with a low actuation voltage of only 14.6 V needed for the operation the switch. The membrane does not bend with this membrane design approach. Finite element modeling is used to analyze the stress and pull-in voltage.

• 한국재료학회:학술대회논문집
• /
• 한국재료학회 2009년도 추계학술발표대회
• /
• pp.48.1-48.1
• /
• 2009

Performance of organic field-effect transistors (OFETs) with various temperature-cured polyacrylate(PA) copolymer as a gate insulator was studied. The PA thin film, which was cured at an optimized temperature, showed high dielectric strength (>7 MV/cm), low leakage current density ($5{\times}10^{-9}\;A/cm^2$ at 1 MV/cm) and enabled negligible hysteresis in MIS capacitor and OFET. A field-effect mobility of ${\sim}0.6\;cm^2/V\;s$, on/off current ratio (Ion/Ioff) of ${\sim}10^5$ and inverse subthreshold slope (SS) as low as 1.22 V/decwere achieved. The high dielectric strength made it possible to scale down the thickness of dielectric, and low-voltage operation of -5 V was successfully realized. The chemical changes were monitored by FT-IR. The morphology and microstructure of the pentacene layer grown on PA dielectrics were also investigated and correlated with OFET device performance.

• 전기전자학회논문지
• /
• 제1권1호
• /
• pp.64-72
• /
• 1997

일반적으로 유도 진동기의 속도는 엔코더를 사용하여 측정되며, 측정된 평균 속도는 필연적인 시간 지연과 시스템 노이즈 등을 포함하고, 저속 운전시에는 운전 성능을 감소시킬 뿐 아니라 시스템 안정성에도 문제를 일으킨다. 또한 인버터의 데드 타임 효과, 스위칭 소자의 순전압 강하등의 영향으로 발생하는 부정확한 인버터 출력 전압은 토크 리플을 발생시키고 이는 저속 영역에서 더욱 크게 나타난다. 따라서 유도 전동기의 저속 영역에서의 운전 성능을 향상시키기 위하여는 위의 두가지 문제점을 해결하여야 한다. 본 논문에서는 칼만 필터를 이용한 유도 전동기의 정확한 순시 속도 추정과, 데드 타임 및 스위칭 소자의 순전압 강하 보상을 통한 인버터 출력 특성의 개선 방법을 제안하고, 유도 전동기의 극저속 운전 성능을 개선하였다.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제55권8호
• /
• pp.399-403
• /
• 2006

An accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation when an external crystal is not available to provide a clock signal. Further, incorporation of the analog memory cell in the low power oscillator is fully implementable in a 0.35um Samsung standard CMOS process. Therefore, the analog memory cell incorporated into the low power oscillator avoids the previous problems in a oscillator by providing a temperature-stable, low power consumption, size-efficient method for generating an accurate reference clock signal that can be used to support long sleep mode operation.

• 전자공학회논문지C
• /
• 제34C권11호
• /
• pp.1-11
• /
• 1997

The transient current components of the dRAM are analyzed and the sensing current, data path operation current and DC leakage current are revealed to be the major curretn components. It is expected that the supply voltage of less than 1.5V with low VT MOS witll be used in multi-giga bit dRAM. A low voltage dual VT self-timed CMOS logic in which the subthreshold leakage current path is blocked by a large high-VT MOS is proposed. An active signal at each node of the nature speeds up the signal propagation and enables the synchronous DRAM to adopt a fast pipelining scheme. The sensing current can be reduced by adopting 8 bit prefetch scheme with 1.2V VDD. Although the total cycle time for the sequential 8 bit read is the same as that of the 3.3V conventional DRAM, the sensing current is loered to 0.7mA or less than 2.3% of the current of 3.3V conventional DRAM. 4 stage pipeline scheme is used to rduce the power consumption in the 4 giga bit DRAM data path of which length and RC delay amount to 3 cm and 23.3ns, respectively. A simple wave pipeline scheme is used in the data path where 4 sequential data pulses of 5 ns width are concurrently transferred. With the reduction of the supply voltage from 3.3V to 1.2V, the operation current is lowered from 22mA to 2.5mA while the operation speed is enhanced more than 4 times with 6 ns cycle time.

• 전기학회논문지
• /
• 제65권10호
• /
• pp.1664-1671
• /
• 2016

This paper presents the analysis of the gate-source voltage of the gallium nitride high electronic mobility transistor (GaN HEMT) in the half bridge structure focused on the mutual effects of two switching operation. Especially low side gate-source voltage is analyzed mathematically according to the high side switch turn-on and turn-off operation. Moreover, the influence of each gate resistance and parasitic component on the switching characteristic of other side switch is investigated, and the formula, simulation and experimental results are compared with theoretical data.

• 전력전자학회논문지
• /
• 제17권4호
• /
• pp.330-336
• /
• 2012

In this paper, novel zero-voltage-transition(ZVT) synchronous buck converter of pulse-width-modulation(PWM) method is proposed to utilize auxiliary circuit. In this proposed scheme, designed to operate low output voltage for portable system and applied synchronous scheme to improve efficiency. Also proposed circuit is designed to do soft-switching operation in every switch. In this paper, the circuit operation is explained and analysed, and design guidelines are presented. To verify the availability of the proposed circuit, experiment and simulation is carried out.

• 전기학회논문지P
• /
• 제56권3호
• /
• pp.123-128
• /
• 2007

Hydro power supplies no pollution energy, mainly induction generator has been applied at the small capacity power station. The generating power of small hydro-electric power station connects on the 22.9kV distribution system or low voltage system in the case of three-phase four-wire supply system. There are side effects of various kinds in the 3-three phase 4-wire distribution system mixing 1-phase load and 3-phase load. This system generates the voltage unbalance by unbalanced load operating condition. They have various serious effects on generator and connection system. In this paper, we analyzed what kind of operation characteristic are happened in the induction generator by customer load variation at the 3-three phase 4-wire distribution system.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
• /
• pp.15-18
• /
• 2003

Pentacene OTFTs of $Al_2O_3$ insulator treated with a diluted PMMA were fabricated for the application of the low voltage operation and large area displays. The operation voltage of 15 V and the mobility of 0.35 $cm^2/Vsec$ are obtained even adopting the thick dielectric of 100 nm which was deposited by atomic layer deposition at the temperature of $150^{\circ}C$. The current on-off ratio was $4.1{\times}10^4$ for the OTFTs treated with 9:1 PMMA and good saturation characteristics were obtained as drain voltage increases.