• Title/Summary/Keyword: Low input

Search Result 3,748, Processing Time 0.036 seconds

Performance Analysis of Thermosphon Using Phase Change Material (상변화 물질을 이용한 열사이폰의 성능 분석)

  • Paek, Yee;Cho, Ki-Hyon;Lee, Joo-Seong
    • Journal of the Korean Society of Industry Convergence
    • /
    • v.3 no.3
    • /
    • pp.219-228
    • /
    • 2000
  • In order to evaluate the applicability of thermosyphon as an equipment of heat transfer to the case where natural of low temperature and low density is necessary and to propose the possibility of using natural energy being clean and inexhaustible, a thermosypon using methanol as working fluid was constructed and its transfer characteristics were analysed. The wall temperature of the thermosyphon was maintained relatively uniform after rapid increase until after being heated about ten minutes regardless of the level of input powers to the evaporating section. Inner pressure of the thermosyphon increased rapidly until after ten minutes, and then increased slowly depending on the level of input power. But heat transfer coefficient of the condensible section decreased in inverse proportion to input powers of 250~300W, showing $1008.3{\sim}829.8W/m^2{\cdot}^{\circ}C$. For the input powers of the thermosyphon within the range of 100~250W, heat transferred and heat flux increased relatively linearly showing, in the case of input powers of 250~300W, heat transfer efficiency considerable increased, showing 63.8%.

  • PDF

A Study on Tensile Properties and HAZ Softening Depending on the Amount of Heat Input in MIG Welding of Al6082-T6 (Al6082-T6의 MIG용접부에서 입열량에 따른 열영향부의 연화와 인장특성에 관한 연구)

  • Baek, Sang-Yeob;Park, Kyung-Do;Kim, Won-Il;Cho, Sang-Myung
    • Journal of Welding and Joining
    • /
    • v.29 no.1
    • /
    • pp.59-64
    • /
    • 2011
  • Al6082-T6 is widely used because of its corrosion resistance and excellent strength. HAZ softening occurs in MIG welding process for this aluminium alloys because this aluminium alloy is heated to higher temperature than its aging temperature during welding. Therefore, low heat input and minimum standard deviation of heat input are required for narrow HAZ width and, for higher strength of welds. In this study, Al6082-T6 was used to examine for HAZ softening with various heat input in aluminium MIG welding. For weldments, micro hardness was measured and tensile test was carried out. Minimum hardness was increased at high speed welding such as 80cm/min and 120cm/min in welding speed comparing with 40cm/min. Also, in case of high speed welding such as 80cm/min and 120cm/min, tensile strength of weldments was increased about 10% comparing with low speed welding(40cm/min).

Buck and Half Bridge Series DC-DC Converter (강압형과 하프 브리지 직렬형 DC-DC 컨버터)

  • Kim Chang-Sun
    • The Transactions of the Korean Institute of Electrical Engineers B
    • /
    • v.54 no.12
    • /
    • pp.616-621
    • /
    • 2005
  • We considered of the buck and half bridge series DC-DC converter. It has good applications in areas with low voltage/high current, wide input voltage. The buck converter ratings and the half bridge converter ratings are $36\~72V$ input and 22V/5A output, $19\~24V$ input and 3.3V/30A output, respectively. Developed the buck and half Bridge series DC-DC converter ratings are of $36\~72V$ input and 3.3V/30A output. The buck converter is operated with zero voltage switching process to reduce the switching losses. The $80.1\%\~97.6\%$ of the efficiency is measured at $18.4{\mu}H$ output filter inductance of buck converter. In the half bridge converter, the $86\%\~96.4\%$ efficiency is measured at 150kHz switching frequency with PQI core. In the case of synchronized the buck and half bridge DC-DC converter, the measured efficiency is higher than that of the unsynchronized converter. In the synchronized converter, the maximum efficiency is measured up to $92.3\%$ with PQI core at 150kHz. 7A output.

Low Complexity GF(2$^{m}$ ) Multiplier based on AOP (회로 복잡도를 개선한 AOP 기반의 GF(2$^{m}$ ) 승산기)

  • 변기영;성현경;김흥수
    • Proceedings of the IEEK Conference
    • /
    • 2003.07c
    • /
    • pp.2633-2636
    • /
    • 2003
  • This study focuses on the new hardware design of fast and low-complexity multiplier over GF(2$\^$m/). The proposed multiplier based on the irreducible all one polynomial (AOP) of degree m, to reduced the system's complexity. It composed of Cyclic Shift, Partial Product, and Modular Summation Blocks. Also it consists of (m+1)$^2$2-input AND gates and m(m+1) 2-input XOR gates. Out architecture is very regular, modular and therefore, well-suited for VLSI implementation.

  • PDF

Design and Fabrication of a S-BAND Receiver for Low Orbit Satellite (저궤도 위성용 S-BAND 수신기 설계 및 제작)

  • Choi, Young-Jin
    • Proceedings of the IEEK Conference
    • /
    • 2005.11a
    • /
    • pp.35-38
    • /
    • 2005
  • In this study, S-Band receiver for low orbit satellite is implemented. The developed receiver is double super-heterodyne type and STDN compatible. Input/output frequency of receiver is 2034.747MHz and 18.414MHz used for KOMPSAT 2 satellite. Overall gain(@AGC=0V) and image rejection were 92.4dB and 50.2dB respectively. It was verified that receiver has stable performance to the temperature limit, power supply voltage variation and input signal level range.

  • PDF

Low Cost Power System Design for Plasma Display Panel(PDP)

  • Yoo, Kwang-Min;Lee, Jun-Young;Lim, Sung-Kyoo
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2006.08a
    • /
    • pp.250-255
    • /
    • 2006
  • A low cost PDP sustain power supply is proposed based on flyback topology using Boundary Conduction Mode(BCM) to control input current regulation. This method guarantees DCM condition to regulate the input current harmonics under all load conditions. An excessive voltage stress due to the link voltage increase can be suppressed by removing link capacitor and adjusting transformer turns ratios, which makes it possible to be used for universal line applications. The proposed converter is tested with a 400W(200V-2A output) prototype circuit.

  • PDF

Korean EFL learners' perception and the effects of structured input processing (구조화된 입력처리 문법지도에 대한 학습자의 인식과 효과)

  • Hwang, Seon-Yoo
    • English Language & Literature Teaching
    • /
    • v.12 no.3
    • /
    • pp.267-286
    • /
    • 2006
  • The purpose of the study was to investigate what kinds of learning strategies EFL learners use to learn English grammar and what is benefit from structured grammar input processing. Students of the study consisted of 48 college students who took Practical English Grammar at a university in Kyung-Gi area and were divided into two groups based on grammar scores. The students were asked to take two grammar tasks and grammar tests and complete a survey including questions on grammar strategy and input processing. The results of the study are as follows. First, learners' grammar level has an effect on use of grammar attack strategy including asking teachers, using grammar books and given contexts whereas there was no significant difference between groups in the planning strategies, Among memory strategies, using grammar exercise and linking with already known structure demonstrated a significant difference between groups. Second, with regard to input processing, high level students got higher score on how much they understood the structured grammar input compared with low level students. Third, explicit implicit instruction added to input processing seems more comprehensible and more available than structured input only, Finally, it showed that there is positive relationship between perception and score of input processing tasks and grammar tests. Especially, learners' perception of input processing correlated more with final tests and tasks. Therefore, it suggests that the more input processing task need to develop and utilize in order to facilitate learners' intake.

  • PDF

A Study On The Power Factor Correction Of The Boost Converter Without The Input Current Measurement (입력 전류의 측정이 필요없는 Boost 컨버터의 역률 보정에 관한 연구)

  • Cho, Sang-Jun;Lee, Kwang-Won
    • Proceedings of the KIEE Conference
    • /
    • 1996.07a
    • /
    • pp.376-378
    • /
    • 1996
  • This paper presents a new PFC control method which replaces a fast line current measurement with a filtered load current measurement. Using the power balance relation between the input and the output of the boost converter. the input current can be described as the function of load current. Thus the PWM signal which effects the switching control of the boost converter is generated using the PFC input voltage, the PFC output voltage and the load current as input variables. By using a filter between the bridge rectifier and a dc-to-dc converter, the input voltage of the dc-to-dc converter is forced to always maintain above zero volt. Then the input current traces a sinewave in phase. The proposed scheme accomplishes a very high power factor and a low harmonic distortion of the line current. The validity of this scheme is demonstrated through simulation.

  • PDF

Sensitivity Analysis of input shaping filter designed in the Z-domain (Z-영역에서 설계된 입력성형필터의 민감도 해석)

  • Park, Un-Hwan;Lee, Jae-Won;Lim, Byoung-Duk
    • Journal of Institute of Control, Robotics and Systems
    • /
    • v.5 no.8
    • /
    • pp.883-888
    • /
    • 1999
  • To obtain high positioning auccuracy for a long, flex bleman Ipulator, residual vibration must be removed from the tip motion. But it is difficult to control the vibration of low frequency. There are open-loop and closed loop methods in the elimination of the residual vibration. We inroduce input shaping technique has been used as a simple open-loop method of controlling the residual vibration of a flexible manipulator. Design of input shaper in the continuous time domain is complicated. This paper presents a new technique that designs input shaper in the z-domain and analyzes input shaping method in the z-domain. This technique is simple and easy to design input shaper.

  • PDF

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-based Input Voltage Range Detection Circuit

  • Dae, Si;Yoon, Kwang Sub
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.14 no.6
    • /
    • pp.706-711
    • /
    • 2014
  • A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82 mW with a single power supply of 1.2V and achieves 4.3 effective number of bits for input frequency up to 1 MHz at 500 MS/s. Therefore it results in 4.6 pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.