• Electrical & Electronic Materials
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• v.8 no.5
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• pp.626-632
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• 1995

In this paper, The effect of the impedances in SNOSFET's memory devices has been developed. The effect of source and drain impedances measured by means of two bias resistances - field effect bias resistance by inner region, external bias resistance. The effect of the impedances by source and drain resistance shows the dependence of the function of voltages applied to the gate. It shows the differences of change in source drain voltage by means of low conductance state and high conductance state. It shows the delay of threshold voltages. The delay time of low conductance state and high conductance state by the impedances effect shows 3[.mu.sec] and 1[.mu.sec] respectively.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.12
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• pp.89-100
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• 1997

This paper investigated a new type of low voltage threshold switch (LVTS). As distinguished from the many other types of electronic threshold switches, the LvTS is ; voltage controlled, occurs at low voltages ($V_{2}$ $O_{5}$lV devices. The average low threshold voltage < $V_{LVT}$>=218 mV (standard deviation =24mV~kT/q, where T=300K), and was independent of the device area (x100) and amorphous oxide occurred in an ~22.angs. thick interphase of the V/amorphous- $V_{2}$ $O_{5}$ contacts. At $V_{LVT}$ there was a transition from an initially low conductance (OFF) state into a succession of quantized states of higher conductance (ON). The OFF state was spatically homogeneous and dominated by tunneling into the interphase. The ON state conductances were consistent with the quantized conductances of ballistic transport through a one dimensional, quantum point contact. The temeprature dependence of $V_{LVT}$, and fit of the material parameters (dielectric function, barrier energy, conductivity) to the data, showed that transport in the OFF and ON states occurred in an interphase with the characteristics of, respectively, semiconducting and metallic V $O_{2}$. The experimental results suggest that the LVTS is likely to be observed in interphases produced by a critical event associated with an inelastic transfer of energy.rgy.y.rgy.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1991.10a
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• pp.48-51
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• 1991

Short channel Nonvolatile EEPROM memory devices were fabricated to CMOS 1M bit design rule, and reviews the characteristics and applications of SNOSFET. Application of SNOS field effect transistors have been proposed for both logic circuits and nonvolatile memory arrays, and operating characteristics with write and erase were investigated. As a results, memory window size of four terminal devices and two terminal devices was established low conductance stage and high conductance state, which was operated in “1” state and “0”state with write and erase respectively. And the operating characteristics of unit cell in matrix array were investigated with implementing the composition method of four and two terminal nonvolatile memory cells. It was shown that four terminal 2${\times}$2 matrix array was operated bipolar, and two termineal 2${\times}$2 matrix array was operated unipolar.

• Parasites, Hosts and Diseases
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• v.59 no.4
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• pp.329-339
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• 2021

Ion channels are important targets of anthelmintic agents. In this study, we identified 3 types of ion channels in Ascaris suum tissue incorporated into planar lipid bilayers using an electrophysiological technique. The most frequent channel was a large-conductance cation channel (209 pS), which accounted for 64.5% of channels incorporated (n=60). Its open-state probability (P_o) was ~0.3 in the voltage range of -60~+60 mV. A substate was observed at 55% of the main-state. The permeability ratio of Cl^- to K⁺ (P_Cl/P_K) was ~0.5 and P_Na/P_K was 0.81 in both states. Another type of cation channel was recorded in 7.5% of channels incorporated (n=7) and discriminated from the large-conductance cation channel by its smaller conductance (55.3 pS). Its Po was low at all voltages tested (~0.1). The third type was an anion channel recorded in 27.9% of channels incorporated (n=26). Its conductance was 39.0 pS and P_Cl/P_K was 8.6±0.8. P_o was ~1.0 at all tested potentials. In summary, we identified 2 types of cation and 1 type of anion channels in Ascaris suum. Gating of these channels did not much vary with voltage and their ionic selectivity is rather low. Their molecular nature, functions, and potentials as anthelmintic drug targets remain to be studied further.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.05a
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• pp.91-96
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• 1992

The nonvolatile SNOSFET EEPROM memory devices with the channel width and iength of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$], 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$] and 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$] were fabricated by using the actual CMOS 1 [Mbit] process technology. The charateristics of I$\_$D/-V$\_$D/, I$\_$D/-V$\_$G/ were investigated and compared with the channel width and length. From the result of measuring the I$\_$D/-V$\_$D/ charges into the nitride layer by applying the gate voltage, these devices ere found to have a low conductance state with little drain current and a high conductance state with much drain current. It was shown that the devices of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$] represented the long channel characteristics and the devices of 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$] and 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$] represented the short channel characteristics. In the characteristics of I$\_$D/-V$\_$D/, the critical threshold voltages of the devices were V$\_$w/ = +34[V] at t$\_$w/ = 50[sec] in the low conductance state, and the memory window sizes wee 6.3[V], 7.4[V] and 3.4[V] at the channel width and length of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$], 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$], 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$], respectively. The positive logic conductive characteristics are suitable to the logic circuit designing.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.05a
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• pp.86-89
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• 1995

In this pacer, The effect of the impedances in SNOSEFT s memory devices has been developed. The effect of source and drain impedances are measuring using the method of the field effect bias resistance in the inner resistance regions of the device structure and external bias resistance. The effect of impedance by source and drain resistance shows according to increasing to the storage of memory charges, shows according to a function of decreasing to the gate voltages, shows the delay of threshold voltages, The delay time of low conductance state and high conductance state by the impedance effect shows 3 [${\mu}$sec] and 1[${\mu}$sec] respectively.

• ETRI Journal
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• v.16 no.2
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• pp.1-13
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• 1994

We have identified two new features related to the coherent transport in the mesoscopic loop structure of aluminum wire, including the autocorrelation of the conductance fluctuations beyond $B_c$ and fine structure in the low-field magnetoresistance curve in the superconducting transition regime, which, to the best of our knowledge, have not been reported in the literature. Since the electrons in Al have a phase coherence length larger than $1\;{\mu}m$ at or below T = 3K, which is comparable to the dimensions of the structure, the wave nature of the electronic transport has been clearly observed: the universal conductance fluctuations, the Aharonov-Bohm oscillations, and the Altshuler-Aronov-Spivak oscillations. Due to the transition of Al to a superconducting state at T = 1.3 K, the coherent phenomena of Cooper pairs, i.e., the Little-Parks oscillations, have also been observed.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.3
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• pp.142-149
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• 2002

As is well-known, the maximum power point (MPP) of PV power generation system depends on array temperature and solar insolation, it is necessary to track MPP of solar array all the time. Among various MPP control algorithms, the constant voltage control method, the perturbation and observation (P&O) method and the incremental conductance method (IncCond) have drawn many attractions due to the usefulness of each system. In this parer, the effectiveness of above mentioned three different control algorithms are thoroughly investigated via simulations and preposed efficiency evaluation method on experiment. Both the steady-state and transient characteristics of each control algorithms along with measured efficiency are analyzed, respectively. Finally, a novel MPPT control algorithm combining the constant voltage control and IncCond method for low insolation condition is proposed to improve efficiency of the 3KW PV power generation system.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.12-12
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• 2010

By using scanning tunneling microscopy/spectroscopy (STM/S), we can make images of various physical properties in nanometer-scale spatial resolutions. Here, I demonstrate imaging of two electron-correlated subjects; screening and superconductivity by STM/S. The electrostatic potential around a charge is described with the Coulomb potential. When the charge is located in a metal, the potential is modified because of the free electrons in the host. The potential modification, called screening, is one of the fundamental phenomena in the condensed matter physics. Using low-temperature STM we have developed a method to measure electrostatic potential in high spatial and energy resolutions, and observed the potential around external charges screened by two-dimensional surface electronic states. Characteristic potential decay and the Friedel oscillation were clearly observed around the charges [1]. Superconductivity of nano-size materials, whose dimensions are comparable with the coherence length, is quite different from their bulk. We investigated superconductivity of ultra-thin Pb islands by directly measuring the superconducting gaps using STM. The obtained tunneling spectra exhibit a variation of zero bias conductance (ZBC) with a magnetic field, and spatial mappings of ZBC revealed the vortex formation [2]. Size dependence of the vortex formation will be discussed at the presentation.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.597-597
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• 2013

The resistive switching behaviors of Pt nanodisk on Nb-doped SrTiO3 single-crystal have been studied with conductive atomic force microscopy in ultra-high vacuum. The nanometer sizes of Pt disks were formed by using self-assembled patterns of silica nanospheres on Nb-doped SrTiO3 single-crystal semiconductor film using the Langmuir-Blodgett, followed by the metal deposition with e-beam evaporation. The conductance images shows the spatial mapping of the current flowing from the TiN coated AFM probe to Pt nanodisk surface on Nb：STO single-crystal substrate, that was simultaneously obtained with topography. The bipolar resistive switching behaviors of Pt nanodisk on Nb：STO single-crystal junctions was observed. By measuring the current-voltage spectroscopy after the forming process, we found that switching behavior depends on the charging and discharging of interface trap state that exhibit the high resistive state (HRS) and low resistive state (LRS), respectively. The results suggest that the bipolar resistive switching of Pt/Nb:STO single-crystal junctions can be performed without the electrochemical redox reaction between tip and sample with the potential application of nanometer scale resistive switching devices.