• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.129-133
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• 1989

In this paper, a robust controller of state delayed systems is presented. The suggested controller stabilizes the closed loop system independently of the delay time. It is shown that the controller reduces the effect of disturbances on the output of the given system to a pre-specified level. The proposed controller will stabilize the closed loop system in the presence of plant perturbations whose size are less than a pre-specified value.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.3
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• pp.189-194
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• 2001

This paper presents a mew design of an inductive position sensing system with high sensitivity. The designed system consists of the driving coils, position-detecting coils, and closed loop formed magnetic blocks. To obtain high sensitivity we design a symmetric and closed loop type measuring system with small air-gaps. The elements that affect the system characteristics are turn ratio, excitation frequency, air-gap size, capacitance effect, and load resistance. By experimental investigation, the influences of these elements are examined and the system parameters are selected. The sensitivity of the newly designed system is greater than 2800mV/(V mm) and the linearity error is below${\pm}0.01%; in; the; range; of; {\pm}200{\mu}m$.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.6
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• pp.410-415
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• 2014

This paper presents a new rectifier with a bootstrapping technique to reduce the effective drop voltage. An all-digital delay locked loop (ADDLL) circuit was also applied to prevent the reverse leakage current. The proposed rectifier uses NMOS diode connected instead of PMOS to reduce the design size and improve the frequency respond. All the sub-circuits of ADDLL were designed with low power consumption to reduce the total power of the rectifier. The rectifier was implemented in CMOS $0.35{\mu}m$ technology. The peak power conversion efficiency was 76 % at an input frequency of 6.78MHz and a power level of 5W.

• Journal of Korea Multimedia Society
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• v.18 no.12
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• pp.1475-1482
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• 2015

In network routers, buffers are used to resolve congestion and reduce packet loss rate whenever congestion occurs at bottleneck link. Most of the existing methods to manage such buffers focus only on queue-length-based control as one loop which have some issues of low link utilization and system stability. In this paper, we propose a novel framework which exploits two-loop control method, e.g. queue-length and congestion window size, combined with optimal margin method to facilitate parameter choices. Simulation results in ns-2 demonstrate that bottleneck link performance can be improved with higher link utilization (85%) and shorter queue length (22%) than the current deployed scheme in commercial routers (RED and DropTail).

• Journal of Power System Engineering
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• v.11 no.4
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• pp.12-17
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• 2007

Recently, many small and medium size diesel vehicles have been equipped with turbocharger and EGR system to get high performance and reduce $NO_x$ emissions but its application to heavy-duty diesel engine is not common yet. In this work, the simulation model for EURO-3 engine was developed using WAVE and then its performance and emission level were verified by comparing with experimental results. The possibility of current EURO-3 engine equipped with LPL EGR system which would be satisfied the EURO-5 regulation are examined. ESC 13 mode was chosen as the primary engine test mode, and the injection timing and fuel quantity were changed to compensate the lost engine performance caused by EGR. The system developed in this study shows that the current EURO-3 engine could satisfy EURO-5 $NO_x$ regulation by applying LPL EGR.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.237-242
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• 2005

H.264/AVC adopts new features compared with previous multimedia algorithms. It is inefficient to implement some of the new blocks using existing DSP instructions. Hence, new instructions are required to implement H.264/AVC. This paper proposes novel instructions for intra-prediction, in-loop deblocking filter, entropy coding and integer transform. Performance comparisons show that the required computation cycles for the in-loop deblocking filter can be reduced about $20{\sim}25%$. This paper also proposes new instructions for the integer transform. The proposed instructions can execute one dimension forward/inverse integer transform. The integer transform can be implemented using much smaller hardware size than existing DSPs.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.37-40
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• 2003

The 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed for applications to the miniature repeater. The miniature dual-band repeater will be used at shopping mall, basements and underground parking lots. The in-loop 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed by designing Si BJT VCO and PLL loop circuits with Colpitts. The prototype of 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer of size 19${\times}$19${\times}$8(mm) has shown operating frequencies of 1.63㎓, 2.33㎓ ranges, RF output of 1dBm(PCS), 1dBm(IMT-2000), phase noise of -100 dBc/Hz(PCS), -95dBc/Hz(IMT-2000) at 10KHz offset, harmonics suppression of -24dB c(PCS), -15dBc(IMT-2000).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.10a
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• pp.86-90
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• 1988

In this paper, the compositional and sintering time dependences of dielectric, electrooptic properties for X/55/45([Ca$.$La$.$Nb]/Zr/Ti)CLN-PZT ceramics, where X is ranged from 3.0 to 11.0 mol %, have been investigated. As CLN mol% is increased, density, curie-temperature and dielectric constant are decreased, and also grain size and transmittance are increased, With the increment of CLN mol %. longitudinal mode electromechanical coupling coefficient is decreased and P-E hysterisis loop became slim-loop slowly. The crystal structure of CLN-PZt ceramics is changed from rhombohedral to tetragonal and pseudo-cubic according to the increment of CLN mol%.

• ETRI Journal
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• v.30 no.4
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• pp.615-617
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• 2008

A novel and compact elliptic-function bandpass filter is proposed in this letter. The techniques of slot etching and the addition of open stubs are applied to enhance the self-inductance and self-capacitance of hexagonal open-loop resonators. Thus, size reduction and improved transmission performance are obtained. Compared to the performance of the conventional design, the central frequency and insertion loss are reduced by 28% and 3.1 dB, respectively. Measurements show that the proposed filter has a fraction bandwidth of 23% at the central frequency of 1.84 GHz, and its insertion loss in the passband is less than -1.5 dB. The bandpass filter occupies only 12 mm${\times}$21.2 mm (approximately $0.24{\lambda}_g{\times}0.14{\lambda}_g$).

• ETRI Journal
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• v.32 no.4
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• pp.610-613
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• 2010

This letter presents the design of a novel multiband USB dongle antenna with a compact ground plane. The radiating patch is composed of a modified meander-line monopole and a shorted loop to generate a dual-broadband resonance. The proposed antenna supports WiBro, Bluetooth, WLAN, WiMAX, and S-DMB services. The total dimensions of the fabricated antenna are 10 mm ${\times}$ 45 mm ${\times}$ 1 mm, the most compact size among multiband USB dongle antennas reported to date. The measured 10 dB reflection loss bandwidths are 20.8% (2.24 GHz to 2.76 GHz) and 20.2% (4.86 GHz to 5.95 GHz). The measured peak gain is 2.97 dBi, and efficiency is higher than 58%. In addition, the radiation pattern approximates an omnidirectional pattern.