• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.5
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• pp.515-525
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• 2014

In this paper, we present a design and implementation of a Voltage-tuned Planar Composite Resonator Oscillator(Vt-PCRO) with a low phase noise. The designed Vt-PCRO is composed of a resonator, two phase shifters, and an amplifier. The resonator is designed using a dual mode SIW(Substrate Integrated Waveguide) resonator and has a group delay of about 40 nsec. Of the two phase shifters (PS1 and PS2), PS1 with a phase shift of $360^{\circ}$ is used for the open loop gain to satisfy oscillation condition without regard to the electrical lengths of the employed microstrip lines in the loop. PS2 with a phase shift of about $70^{\circ}$ is used to tune oscillation frequency. The amplifier is constructed using two stages to compensate for the loss of the open loop. Through the measurement of the open loop gain, the tune voltage of the PS1 can be set to satisfy the oscillation condition and the loop is then closed to form the oscillator. The oscillator with a oscillation frequency of 5.345 GHz shows a phase noise of -130.5 dBc/Hz at 100 kHz frequency offset. The oscillation power and the electrical frequency tuning range is about 3.5 dBm and about 4.2 MHz for a tuning voltage of 0~10 V, respectively.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.925-926
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• 2006

This paper presents a sensorless speed control of an interior permanent magnet synchronous motor using an adaptive integral binary observer and fuzzy logic controller. In view of composition with a main loop regulator and an auxiliary loop regulator, the binary observer has a property of the chattering alleviation in the constant boundary layer. However, the steady state estimation accuracy and robustness are dependent upon the width of the constant boundary. In order to improve the steady state performance of the binary observer, the binary observer is formed by adding extra integral dynamics to the switching hyperplane equation. Also, because the conventional fixed gain PI controller are very sensitive to step change of command speed, parameter variations and load disturbance, the fuzzy logic controller is used to compensate a fixed gain PI controller. Therefore, a gain PI is fixed and the IPMSM is drived at another speed region. The effectiveness of the proposed the adaptive integral observer and the fuzzy logic controller are confirmed by experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.22-28
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• 2009

This paper presents a fast received signal strength indicator (RSSI) circuit for wireless communication application. The proposed circuit is developed using power detectors and an analog-to-digital converter to achieve a fast settling time. The power detector is consisted of a novel logarithmic variable gain amplifier (VGA), a peak detector, and a comparator in a closed loop. The VGA achieved a wide logarithmic gain range in a closed loop form for stable operation. For the peak detector, a fast settling time and small ripple are obtained using the orthogonal characteristics of quadrature signals. In $0.18-{\mu}m$ CMOS process, the RSSI value settles down in $20{\mu}s$ with power consumption of 20 mW, and the maximum ripple of the RSSI is 30 mV. The proposed RSSI circuit is fabricated with a personal handy-phone system transceiver. The active area is $0.8{\times}0.2\;mm^2$.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.341-342
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• 2007

The IRFPA (InfraRed Focal Plane Array) ROIC (ReadOut Integrated Circuit) was designed in folded-cascode Op-Amp using $0.35{\mu}m$ CMOS technology. As the folded-cascode has high open-loop voltage gain and fast settling time, that used in many analog circuit designs. In this paper, folded-cascode Op-Amp for ROIC of the $32{\times}32$ IRFPA has been designed. HSPICE simulation results are unit gain bandwidth of 13.0MHz, 90.6 dB open loop gain, 8 V/${\mu}m$ slew rate, 600 ns settling time and $66^{\circ}$ phase margin.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1970-1979
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• 2017

Ultra Lift Luo Converter (ULC) gained considerable research interest in recent years. The stability analysis of voltage mode and peak current mode controlled ULC in continuous conduction mode is analyzed in this paper. The Eigen value theory is used for the stability analysis of voltage mode controlled ULC. Then to characterize the dynamics of inner current loop, the expressions of closed loop transfer function and loop gain are determined. An algorithm has been developed to analyze the stability of the peak current mode controlled ULC. The theoretical results are correlated with the simulation results obtained using PSIM 9.1(SMARTCTRL 1.0) software. Finally it is proposed to fabricate a prototype and validate the performance by suitable experimental setup.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.609-614
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• 1998

A new small signal modeling of an average current mode control is proposed. In order to analyze the characteristics of the control scheme, the discrete and continuous time small signal models are derived. The derivation are mainly come from the analysis of the sampling effect presented in the current control loop. By the mathematical interpretation of practical sampler representing the sampling effect of a current control loop, the small signal models of an average current mode control can be easily derived. The instability of the current control loop, which gives rise to the subharmonic oscillation, can be identified by the proposed models. To show the usefulness of the proposed models, the simulation and experiment are carried out. The results show that the predicted results by the proposed model are much better agreed with the measured ones than that of the conventional model, even though the high gain of the compensation network of a current control loop is employed.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.965-968
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• 2003

This paper describes the PWM-VSI controller of three-phase UPS system using stationary reference frame. This controller meets the specification the UPS inverter output voltage even under the unbalanced or nonlinear load. This controller is also constructed with duble control loop of the outer voltage control loop and the inner current control loop. For the fast response of the output voltage control, yhr inner current control loop of the capacitor current os used. To get the good property against overshoot, the If controller us used. The outer voltage controller is designed with P controller and the high gain transfer function is used for the zero steady state error. All control gains of both controller is designed base on the CDM method.

• Journal of Institute of Control, Robotics and Systems
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• v.7 no.4
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• pp.351-361
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• 2001

In this paper, a generalized framework called as robust internal-loop compensator(RIC) is presented, and by using this, a structural design method of sliding of sliding mode controller is proposed. First, a general sliding mode controller is derived and a stabilizing control input is designed based on Lyapunov redesign for the system in the presence of uncertainty and disturbance. And adopting the internal model following control, RIC is proposed. Next, using the structural characteristics of the proposed RIC, disturbance attenuation characteristics are analyzed and the performance of the closed-loop system is predicted. Through this analysis, it is shown that if the control gain of RIC is increased by N times, the magnitude of error is reduced to its 1/N. the proposed method is verified through experiments using a high-precision positioning system and the performance is evaluated.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.1
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• pp.60-66
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• 1996

Brushless DC(BLDC) motor have been increasingly used in machine tools and robotics applications due to the reliability and the efficiency. In control of BLDC motor, it is important to construct the controller which is robust to parameter variations and external disturbances. Variable structure controller(VSC) has been known as a powerful tool in robust control of time varying systems. In practical systems, however, VSC has a high frequency chattering which deteriorates system performances. In this paper, a binary controller(BC) which takes the form of VSC and MRAC combined is presented to solve this problem. BC consists of the primary loop controller and the external loop controller to change the gain of primary loop controller smoothly. So it can generate the continuous control input and is insensitive to parameter variations in the given domain. To confirm the validity, various investigations of control characteristics for various design parameters in a position control system of BLDC motor are carried out. (author). 11 refs., 18 figs., 1 tab.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.8
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• pp.987-995
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• 1999

A new robust controller design methodology for single-input single-output systems is proposed, where the proposed controller consists of a conventional or optimal servo controller at the outer loop as well as the robust internal-loop compensator(RIC) to eliminate the model uncertainty and external disturbance. It is shown that RIC with finite gain can make actual systems be nominal models within a prespecified error bound. And, it is also shown that RIC-based system is robustly stable regardless of input saturation. Several numerical examples are illustrated to show validities of the proposed robust controller.