• Journal of Power Electronics
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• v.19 no.6
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• pp.1429-1439
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• 2019

Buck-Boost LLC (BBLLC) converters based on a PWM + phase control strategy are good candidates for high efficiency, high power density and wide input range applications. Nevertheless, they suffer from large computational complexity when it comes to calculating the optimal phase for ZVS of all the switches. In this paper, a method is proposed for a microcontroller unit (MCU) to calculate the optimal phase quickly and accurately. Firstly, a 2-D lookup table of the phase is established with an index of the input voltage and output current. Then, a bilinear interpolation method is applied to improve the accuracy. Meanwhile, simplification of the phase equation is presented to reduce the computational complexity. When compared with conventional curve-fitting and LUT methods, the proposed method makes the best tradeoff among the accuracy of the optimal phase, the computation time and the memory consumption of the MCU. Finally, A 350V-420V input, 24V/30A output experimental prototype is built to verify the proposed method. The efficiency can be improved by 1% when compared with the LUT method, and the computation time can be reduced by 13.5% when compared with the curve-fitting method.

• Journal of IKEEE
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• v.23 no.2
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• pp.461-468
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• 2019

A continuous-time Delta-Sigma ADC has various benefits; it does not require an explicit anti-aliasing filter, and it is able to handle wider-band signals with less power consumption in comparison with a discrete-time Delta-Sigma ADC. However, it inherently needs to sample the signal with a high-speed clock, necessitating a complex decimation filter that operates at high speed in order to convert the modulator output to a low-rate high-resolution digital signals without causing aliasing. This paper proposes a continuous-time Delta-Sigma ADC architecture that employs pulse-width modulation and shows that the proposed architecture lends itself to a simpler implementation of the decimation filter using a lookup table.

• Journal of Advanced Information Technology and Convergence
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• v.10 no.2
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• pp.153-166
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• 2020

DDI(Display Driver IC) are used to drive numerous pixels that make up display. For stable driving of DDI, it is necessary to attach a protective film to shield electromagnetic waves. When the protective film is attached, defects often occur if the film is inclined or the center point is not aligned. In order to minimize such defects, an algorithm for correcting the center point and the inclined angle using camera image information is required. This technology detects the corner coordinates of the protective film by image processing in order to correct the positional defects where the protective film is attached. Corner point coordinates are detected using an algorithm, and center point position finds and correction values are calculated using the detected coordinates. LUT (Lookup Table) is used to quickly find out whether the angle is inclined or not. These algorithms were described by Verilog HDL. The method using the existing software requires a memory to store the entire image after processing one image. Since the method proposed in this paper is a method of scanning by adding a line buffer in one scan, it is possible to scan even if only a part of the image is saved after processing one image. Compared to those written in software language, the execution time is shortened, the speed is very fast, and the error is relatively small.

• Nuclear Engineering and Technology
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• v.54 no.11
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• pp.4209-4214
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• 2022

Precise modelling of the interaction of ions with materials is important for many applications including material characterization, ion implantation in devices, thermonuclear fusion, hadron therapy, secondary particle production (e.g. neutron), etc. In this study, a new approach using the Geant4 toolkit in combination with the Bayesian regularization (BR) learning algorithm of the feed-forward neural network (FFNN) is developed to estimate the range of ions in materials accurately and quickly. The different incident ions at different energies are interacted with the target materials. The Geant4 is utilized to model the interactions and to calculate the range of the ions. Afterward, the appropriate architecture of the FFNN-BR with the relevant input features is utilized to learn the modelled ranges and to estimate the new ranges for the new cases. The notable achievements of the proposed approach are: 1- The range of ions in different materials is given as quickly as possible and the time required for estimating the ranges can be neglected (i.e. less than 0.01 s by a typical personal computer). 2- The proposed approach can generalize its ability for estimating the new untrained cases. 3- There is no need for a pre-made lookup table for the estimation of the range values.

• ETRI Journal
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• v.44 no.1
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• pp.51-61
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• 2022

In this paper, we introduced a novel voxel-wise UV parameterization and view-dependent texture synthesis for the immersive rendering of a truncated signed distance field (TSDF) scene model. The proposed UV parameterization delegates a precomputed UV map to each voxel using the UV map lookup table and consequently, enabling efficient and high-quality texture mapping without a complex process. By leveraging the convenient UV parameterization, our view-dependent texture synthesis method extracts a set of local texture maps for each voxel from the multiview color images and separates them into a single view-independent diffuse map and a set of weight coefficients for an orthogonal specular map basis. Furthermore, the view-dependent specular maps for an arbitrary view are estimated by combining the specular weights of each source view using the location of the arbitrary and source viewpoints to generate the view-dependent textures for arbitrary views. The experimental results demonstrate that the proposed method effectively synthesizes texture for an arbitrary view, thereby enabling the visualization of view-dependent effects, such as specularity and mirror reflection.

• The KIPS Transactions:PartA
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• v.13A no.2 s.99
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• pp.123-136
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• 2006

The prefetching technique is an effective way to reduce the latency caused memory access. However, excessively aggressive prefetch not only leads to cache pollution so as to cancel out the benefits of prefetch but also increase bus traffic leading to overall performance degradation. In this thesis, a prefetch filtering scheme is proposed which dynamically decides whether to commence prefetching by referring a filtering table to reduce the cache pollution due to unnecessary prefetches In this thesis, First, prefetch hashing table 1bitSC filtering scheme(PHT1bSC) has been shown to analyze the lock problem of the conventional scheme, this scheme such as conventional scheme used to be N:1 mapping, but it has the two state to 1bit value of each entries. A complete block address table filtering scheme(CBAT) has been introduced to be used as a reference for the comparative study. A prefetch block address lookup table scheme(PBALT) has been proposed as the main idea of this paper which exhibits the most exact filtering performance. This scheme has a length of the table the same as the PHT1bSC scheme, the contents of each entry have the fields the same as CBAT scheme recently, never referenced data block address has been 1:1 mapping a entry of the filter table. On commonly used prefetch schemes and general benchmarks and multimedia programs simulates change cache parameters. The PBALT scheme compared with no filtering has shown enhanced the greatest 22%, the cache miss ratio has been decreased by 7.9% by virtue of enhanced filtering accuracy compared with conventional PHT2bSC. The MADT of the proposed PBALT scheme has been decreased by 6.1% compared with conventional schemes to reduce the total execution time.

• IEMEK Journal of Embedded Systems and Applications
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• v.10 no.4
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• pp.189-198
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• 2015

Most IoT-related approaches have tried to establish the relation by connecting the network between things. The proposed research will present how the pervasive interaction of eco-system formed by touching the objects between humans and things can be recognized on purpose. By collecting and sharing the detected patterns among all kinds of things, we can construct the environment which enables individualized interactions of different objects. To perform the aforementioned, we are going to utilize technical procedures such as event-driven signal processing, pattern matching for signal recognition, and hardware in the loop simulation. We will also aim to implement the prototype of sensor processor based on Arduino MCU, which can be integrated with system using Arduino-Matlab/Simulink hybrid-interoperation environment. In the experiment, we use piezo transducer to detect the vibration or vibrates the surface using acoustic wave, which has specific frequency spectrum and individualized signal shape in terms of time axis. The signal distortion in time and frequency domain is recorded into memory tracer within sensor processor to extract the meaningful pattern by comparing the stored with lookup table(LUT). In this paper, we will contribute the initial prototypes for the acoustic touch processor by using off-the-shelf MCU and the integrated framework based on Matlab/Simulink model to provide the individualization of the touch-sensing for the user on purpose.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.102-107
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• 2007

This paper proposes a H.264/AVC entropy decoder without embedded processor nor memory fabrication process. Many researches on H.264/AVC entropy decoders require ROM or RAM fabrication process, which is difficult to be implemented in general digital logic fabrication process. Furthermore, many researches require embedded processors for bitstream manipulation, which increases area and power consumption. This papers proposes hardwired H.264/AVC entropy decoder without embedded processor, which improves data processing speed and reduces power consumption. Furthermore, its CAVLC decoder optimizes lookup table and internal buffer without embedded memory, which reduces hardware size and can be implemented in general digital logic fabrication process without ROM or RAM fabrication process. Designed entropy decoder was embedded in H.264/AVC video decoder, and it was verified to operate correctly in the system. Synthesized in TSMC 90nm fabrication process, its maximum operation frequency is 125MHz. It supports QCIF, CIF, and QVGA image format. Under slight modification of nC register and other blocks, it also support VGA image format.

• Journal of Advanced Navigation Technology
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• v.19 no.6
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• pp.614-622
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• 2015

Binary MQ arithmetic coding is widely used recently as a basic entropy coder in multimedia coding system. MQ coder esteems high in compression efficiency to be used in JBIG2 and JPEG2000. The importance of arithmetic coding is increasing after it is adopted as an unique entropy coder in HEVC standard. In the binary MQ coder, arithmetic approximation without multiplication is used in the process of recursive subdivision of range interval. Because of the MPS/LPS exchange activity happened in MQ coder, output byte tends to increase. This paper proposes an enhanced binary MQ arithmetic coder to make use of a lookup table for AQe using quantization skill in order to reduce the deficiency. Experimental results show that about 4% improvement of compression in case of JBIG2 for bi-level image compression standard. And also, about 1% improvement of compression ratio is obtained in case of lossless JPEG2000 coding. For the lossy JPEG2000 coding, about 1% improvement of PSNR at the same compression ratio. Additionally, computational complexity is not increasing.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.5
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• pp.464-474
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• 2000

All-to-all personalized communication, or complete exchange, is at the heart of numerous applications, such as matrix transposition, fast Fourier Transform(FFT), and distributed table lookup.We present an efficient all-to-all personalized communication algorithm for a 2D torus inwormhole-routed networks. Our complete exchange algorithm adopts divide-and-conquer approach toreduce the number of start-up latency significantly, which is a good metric for network performancein wormhole networks. First, we divide the whole network into 2x2 basic cells, After speciallydesignated nodes called master nodes have collected messages to transmit to the rest of the basic cell,only master nodes perform complete exchange with reduced network size, N/2 x N/2. When finishedwith this complete exchange in master nodes, these nodes distribute messages to the rest of the masternode, which results in the desired complete exchange communication. After we present our algorithms,we analyze time complexities and compare our algorithms with several previous algorithms. And weshow that our algorithm is efficient by a factor of 2 in the required start-up time which means thatour algorithm is suitable for wormhole-routed networks.