• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.12B
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• pp.1175-1182
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• 2010

In this paper, we implemented a digital circuit which is targeted on FPGA for estimating azimuth information and distance between aircraft and ground station. All functions for signal processing of TACAN were integrated into a FPGA. The proposed hardware consists of input interface, register file, decoder, signal generator and main controller block. The designed hardware includes a function to generating pulse pair group for azimuth information, a function to responding the interrogation of aircraft for estimating distance between aircraft and ground station, and a function to provide ID information of ground station. The proposed hardware was implemented with FPGA chipset of ALTERA and occupied with 7,071 logic elements.

• Proceedings of the KIEE Conference
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• 2001.07e
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• pp.127-133
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• 2001

In SRM drive, the ON OFF angles of each phase switch should be accurately controlled in order to control the torque and speed stably. The accuracy of the switching angles is dependent upon the resolution of the encoder and the sampling period of the microprocessor, that are used to provide the information of the rotor position and to control the SRM power circuit, respectively. However, as the speed increases, the amount of the switching angle deviation from the preset values is also increased. Therefore, the low cost encoder suitable for the practical and stable SRM drive is proposed and the control algorithm to provide the switching signals using the simple digital logic circuit is also presented in this paper. As a result, a stable high speed SRM drive can be achieved by the high resolution switching angle control and it is verified from the experiments that the proposed encoder and logic controller can be a powerful candidate for the practical low cost SRM drive.

• Journal of Power Electronics
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• v.12 no.5
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• pp.800-812
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• 2012

This paper analyses the mathematical model and control strategies of a Hybrid Active Power Filter with Injection Circuit (IHAPF). The control strategy based on the load harmonic current detection is selected. A novel control method for a IHAPF, which is based on the analyzed control mathematical model, is proposed. It consists of two closed-control loops. The upper closed-control loop consists of a single fuzzy logic controller and the IHAPF model, while the lower closed-control loop is composed of an Adaptive Network based Fuzzy Inference System (ANFIS) controller, a Neural Generalized Predictive (NGP) regulator and the IHAPF model. The purpose of the lower closed-control loop is to improve the performance of the upper closed-control loop. When compared to other control methods, the simulation and experimental results show that the proposed control method has the advantages of a shorter response time, good online control and very effective harmonics reduction.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2717-2719
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• 2003

In this paper, we developed an efficient virtual experiment kit with creative and interactive multimedia contents, which can be used to enhance the quality of education in the area of digital logic circuits. Since our virtual experiment kit is implemented to describe the on-campus laboratory, the learners can obtain similar experimental data through it. Also, our web-based virtual experiment kit is designed to enhance the efficiency of both the learners and the educators. The learners will be able to achieve high learning standard and the educators save time and labor. The virtual experiment is performed according to the following procedure: (1) Circuit Composition on the Bread Board (2) Applying Input Voltage (3) Output Measurements (4) Checkout of Experiment Results. Furthermore, the circuit composition on the bread board and its corresponding online schematic diagram are displayed together on the virtual experiment kit for the learner's convenience. Finally, we have obtained several affirmative effects such as reducing the total experimental hours and the damage rate for experimental equipments and increasing learning efficiencies as well as faculty productivity.

• The KIPS Transactions:PartA
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• v.10A no.3
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• pp.255-260
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• 2003

In recent, as a typical example of RFID, the contactless IC card is widely used in traffic, access control system and so forth. And its use becomes a general tendency more and more because of the development of RF technology and improvement of requirement for user convenience. This paper describes the hardware module to process embedded contactless protocol for implementation contactless IC card. And the hardware module consists of analog circuits and specific digital logic circuits. This paper also describes more effective design method of contactless IC card, which method separates into analog circuit parts, digital logic circuit part, and software parts according to the role of the design parts.

• Journal of Semiconductor Engineering
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• v.3 no.2
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• pp.161-167
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• 2022

Electrical characteristics of LDMOS power device with LDD(Lightly Doped Drain) structure is studied with variation of the region of channel and LDD. The channel in LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of CMOS inverter. Two-dimensional TCAD MEDICI simulation is used to study hot-carrier effect, on-resistance Ron, breakdown voltage, and transient switching characteristic. The voltage-transfer characteristics and on-off switching properties are studied as a function of the channel length and doping levels. The digital logic levels of the output and input voltages are analyzed from the transfer curves and circuit operation. Study indicates that drain current significantly depends on the channel length rather than the LDD region, while the switching transient time is almost independent of the channel length. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• ETRI Journal
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• v.24 no.6
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• pp.473-476
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• 2002

This letter proposes an efficient kernel-based partitioning algorithm for reducing area and power dissipation in combinational circuit designs using don't-care sets. The proposed algorithm decreases power dissipation by partitioning a given circuit using a kernel extracted from the logic. The proposed algorithm also reduces the area overhead by minimizing duplicated gates in the partitioned sub-circuits. The partitioned subcircuits are further optimized utilizing observability don't-care sets. Experimental results for the MCNC benchmarks show that the proposed algorithm synthesizes circuits that on the average consume 22.5% less power and have 12.7% less area than circuits generated by previous algorithms based on a precomputation scheme.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1093-1096
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• 1998

The architecture and circuit design of low voltage, high performance barrel shifter is proposed in this paper. The proposed architecture consists of two arrays for byte and bit rotate/shift to perform 32-bit operation and is preferred for even bigger data length as it can be adapted for 64-bit extention with no increase of number of stages. NORA logic structure was used for circuit implementation to achieve the best performance in terms of speed, power and area. The complicated cloking control has been resolved with the ingenious design of clock dirver. The circuit simulation results in 3.05ns delay, 9.37㎽ power consumption at 1V, 160MHz operation when its implemented in low power $0.5\mu\textrm{m}$ CMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.76-83
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• 2006

We proposed a new level shifter circuit architecture. The prposed circuit can provide high output voltage upto 15V by taking 3.3V logic signal compared to the conventional level shifter. The unposed circuit has compatible speed, low power consumption and chip size. We have confirmed the operation by conducting HSPICE simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.5
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• pp.2294-2297
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• 2011

The research which sees currently inspects the damage of the street lamp circuit which is used selectively the diode for developed. Street lamp diagnosis is developed will grasp the lighting presence of LED indication systems and will be able to inspect selectively. The case where the street lamp will not light, will be able to indicate with the relationship of LED putting out lights where the breakdown should have occurred in which part. Circuit produced PCB borads and the system will be able to confirm the breakdown point location of street lamp individual grade developed.